| 國立臺灣大學 |
2004 |
Zero-Aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero
|
Chang, Yen-Jen; Lai, Feipei; Yang, Chia-Lin |
| 國立臺灣大學 |
2004 |
Software-Controlled Cache Architecture for Energy Efficiency
|
Yang, Chia-Lin; Hung-Wei Tseng; Ho, Chia-Chiang; Wu, Ja-Ling |
| 國立臺灣大學 |
2004 |
Tolerating Memory Latency Through Push Prefetching for Pointer-Intensive Applications
|
Yang, Chia-Lin; Lebeck, Alvin R.; Tseng, Hung-Wei; Lee, Chien-Hao |
| 國立臺灣大學 |
2004 |
Energy-Efficient Flash Memory Storage Systems with an Interrupt Emulation Mechanism
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 國立臺灣大學 |
2004 |
Profit-Driven Uniprocessor Scheduling with Energy and Timing Constraints
|
Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin |
| 國立臺灣大學 |
2004 |
Temporal Floorplanning Using 3D-subTCG
|
Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung |
| 國立臺灣大學 |
2004 |
Temporal Floorplanning using T-tree Formulation
|
Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen |
| 國立臺灣大學 |
2004 |
Value-Conscious Cache: Simple Technique for Reducing Cache Access Power
|
Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei |
| 國立臺灣大學 |
2004 |
An Interrupt-Emulation Mechanism with Power-Saving for Flash-Memory Storage Systems
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Energy-efficient flash-memory storage systems with an interrupt-emulation mechanism
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Profit-Driven Uniprocessor Scheduling with Energy and Timing Constraints
|
Yang, Chia-Lin; Kuo, Tei-Wei; Chen, Jian-Jia; Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Temporal Floorplanning Using 3D-subTCG
|
Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung; Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung |
| 臺大學術典藏 |
2004 |
An Interrupt-Emulation Mechanism with Power-Saving for Flash-Memory Storage Systems
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Zero-Aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero
|
Chang, Yen-Jen; Lai, Feipei; Yang, Chia-Lin; Chang, Yen-Jen; Lai, Feipei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Energy-Efficient Flash Memory Storage Systems with an Interrupt Emulation Mechanism
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Multiprocessor Energy-Efficient Scheduling with Task Migration Considerations.
|
Hsu, Heng-Ruey; Chuang, Kai-Hsiang; Yang, Chia-Lin; Pang, Ai-Chun; Kuo, Tei-Wei; CHIA-LIN YANG; Chen, Jian-Jia |
| 臺大學術典藏 |
2004 |
Workload Characterization of the H.264/AVC Decoder.
|
CHIA-LIN YANG; Tung, Yi-Shin; Shih, Tse-Tsung; Yang, Chia-Lin |
| 國立臺灣大學 |
2003-12 |
Smart cache: an energy-efficient D-cache for a software MPEG-2 video decoder
|
Yang, Chia-Lin; Tseng, Hung-Wei; Ho, Chia-Chiang |
| 國立臺灣大學 |
2003-08 |
A power-aware SWDR cell for reducing cache write power
|
Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei |
| 臺大學術典藏 |
2003-08 |
A power-aware SWDR cell for reducing cache write power
|
Chang, Y.-J. and Yang, C.-L. and Lai, F.; Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei; Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei |
| 臺大學術典藏 |
2003 |
A power-aware SWDR cell for reducing cache write power.
|
CHIA-LIN YANG; Lai, Feipei; Yang, Chia-Lin; Chang, Yen-Jen |
| 國立臺灣大學 |
2002-12 |
Using Intel Streaming SIMD Extensions for 3D Geometry Processing
|
Ma, Wan-Chun; Yang, Chia-Lin |
| 臺大學術典藏 |
2002 |
A Programmable Memory Hierarchy for Prefetching Linked Data Structures.
|
Yang, Chia-Lin; Lebeck, Alvin R.; CHIA-LIN YANG |
| 臺大學術典藏 |
2000 |
Push vs. pull: data movement for linked data structures.
|
Yang, Chia-Lin; Lebeck, Alvin R.; CHIA-LIN YANG |
| 國立臺灣大學 |
|
HotSpot Cache: Saving I-Cache Energy with Dynamic Program Hot Spot Detection for Multimedia Applications
|
Yang, Chia-Lin; Lee, Chien-Hao |
