| 國立交通大學 |
2017-04-21T06:49:42Z |
A low-power low-swing single-ended multi-port SRAM
|
Yang, Hao-, I; Chang, Ming-Hung; Lai, Ssu-Yun; Wang, Hsiang-Fei; Hwang, Wei |
| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
|
Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
|
Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2014-12-16T06:15:25Z |
DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELL
|
Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:15:18Z |
LOW POWER STATIC RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:18Z |
STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:17Z |
DATA-AWARE DYNAMIC SUPPLY RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng |
| 國立交通大學 |
2014-12-16T06:15:14Z |
GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE
|
YANG Hao-I; Chuang Ching-Te; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:06Z |
STATIC RANDOM ACCESS MEMORY CELL AND METHOD OF OPERATING THE SAME
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:04Z |
DUAL-PORT SUBTHRESHOLD SRAM CELL
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:56Z |
SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
|
CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:56Z |
Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability
|
Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:49Z |
STATIC RANDOM ACCESS MEMORY WITH RIPPLE BIT LINES/SEARCH LINES FOR IMROVING CURRENT LEAKAGE/VARIATION TOLERANCE AND DENSITY/PERFORMANCE
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CHUANG Ching-Te; YANG Hao-I; LU Chien-Yu; CHEN Chien-Hen; CHANG Chi-Shin; HUANG Po-Tsang; LAI Shu-Lin; HWANG Wei; JOU Shyh-Jye; TU Ming-Hsien |
| 國立交通大學 |
2014-12-16T06:14:10Z |
Disturb-free static random access memory cell
|
Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:14:08Z |
Static random access memory with data controlled power supply
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:14:07Z |
Data-aware dynamic supply random access memory
|
Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng |
| 國立交通大學 |
2014-12-16T06:14:04Z |
Gate oxide breakdown-withstanding power switch structure
|
Yang Hao-I; Chuang Ching-Te; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:01Z |
Static random access memory cell and method of operating the same
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:13:59Z |
Dual-port subthreshold SRAM cell
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:13:54Z |
Low power static random access memory
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:13:50Z |
Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performance
|
Chuang Ching-Te; Yang Hao-I; Lu Chien-Yu; Chen Chien-Hen; Chang Chi-Shin; Huang Po-Tsang; Lai Shu-Lin; Hwang Wei; Jou Shyh-Jye; Tu Ming-Hsien |
| 國立交通大學 |
2014-12-16T06:13:49Z |
Oscillato based on a 6T SRAM for measuring the bias temperature instability
|
Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:13:47Z |
Static random access memory apparatus and bit-line voltage controller thereof
|
Chuang Ching-Te; Lien Nan-Chun; Liao Wei-Nan; Chang Chi-Hsin; Yang Hao-I; Hwang Wei; Tu Ming-Hsien |
| 國立交通大學 |
2014-12-12T01:23:24Z |
高可靠度奈米級靜態隨機存取記憶體設計： 可靠度分析與改善技術
|
楊皓義; Yang, Hao-I; 黃威; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:37:44Z |
Impacts of gate-oxide breakdown on power-gated SRAM
|
Yang, Hao-I; Hwang, Wei; Chuang, Ching-Te |
