|
"yao wen chang"的相关文件
显示项目 161-185 / 348 (共14页)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
每页显示[10|25|50]项目
| 臺大學術典藏 |
2018-09-10T08:14:56Z |
Template-mask design methodology for double patterning technology
|
Hsu, C.-H.;Chang, Y.-W.;Nassif, S.R.; Hsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:14:56Z |
Redundant-wires-aware ECO timing and mask cost optimization
|
Fang, S.-Y.; Chien, T.-F.; Chang, Y.-W.; Fang, S.-Y.; Chien, T.-F.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:14:56Z |
Pulsed-latch aware placement for timing-integrity optimization
|
Chuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; Chuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:58Z |
Generic universal switch blocks
|
Shyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:58Z |
Clustering- and probability-based approach for time-multiplexed FPGA partitioning
|
Chang, Yao-Wen; YAO-WEN CHANG; Jiang, Iris Hui-Ru; Chao, Mango Chia-Tso; Wu, Guang-Ming |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
An efficient pre-assignment routing algorithm for flip-chip designs
|
Lee, P.-W.;Lin, C.-W.;Chang, Y.-W.;Shen, C.-F.;Tseng, W.-C.; Lee, P.-W.; Lin, C.-W.; Chang, Y.-W.; Shen, C.-F.; Tseng, W.-C.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
A progressive-ILP-based routing algorithm for the synthesis of cross-referencing biochips
|
Yuh, P.-H.;Sapatnekar, S.S.;Yang, C.-L.;Chang, Y.-W.; Yuh, P.-H.; Sapatnekar, S.S.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
A novel wire-density-driven full-chip routing system for cmp variation control
|
Chen, H.-Y.;Chou, S.-J.;Wang, S.-L.;Chang, Y.-W.; Chen, H.-Y.; Chou, S.-J.; Wang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
A novel wire-density-driven full-chip routing system for CMP variation control
|
Chen, H.-Y.;Chou, S.-J.;Wang, S.-L.;Chang, Y.-W.; Chen, H.-Y.; Chou, S.-J.; Wang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
A novel hot-electron programming method in a buried diffusion bit-line SONOS memory by utilizing nonequilibrium charge transport
|
Wang, T.;Tang, C.-J.;Li, C.-W.;Lee, C.-H.;Ou, T.-F.;Chang, Y.-W.;Tsai, W.-J.;Lu, T.-C.;Chen, K.-C.;Lu, C.-Y.; Wang, T.; Tang, C.-J.; Li, C.-W.; Lee, C.-H.; Ou, T.-F.; Chang, Y.-W.; Tsai, W.-J.; Lu, T.-C.; Chen, K.-C.; Lu, C.-Y.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:57Z |
Quasi-universal switch matrices for FPD design
|
Wu, G.-M.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:56Z |
BIST design optimization for large-scale embedded memory cores
|
Chien, T.-F.;Chao, W.-C.;Li, C.-M.;Chang, Y.-W.;Liao, K.-Y.;Chang, M.-T.;Tsai, M.-H.;Tseng, C.-M.; Chien, T.-F.; Chao, W.-C.; Li, C.-M.; Chang, Y.-W.; Liao, K.-Y.; Chang, M.-T.; Tsai, M.-H.; Tseng, C.-M.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:56Z |
Analog placement based on symmetry-island formulation
|
Lin, P.-H.;Chang, Y.-W.;Lin, S.-C.; Lin, P.-H.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:56Z |
Analog placement based on symmetry-Island formulation
|
Lin, P.-H.;Chang, Y.-W.;Lin, S.-C.; Lin, P.-H.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:56Z |
Analog layout synthesis - Recent advances in topological approaches
|
Graeb, H.;Balasa, F.;Castro-Lopez, R.;Chang, Y.-W.;Fern;ez, F.V.;Lin, P.-H.;Strasser, M.; Graeb, H.; Balasa, F.; Castro-Lopez, R.; Chang, Y.-W.; Fern; ez, F.V.; Lin, P.-H.; Strasser, M.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:55Z |
ILP-based pin-count aware design methodology for microfluidic biochips
|
Lin, C.C.-Y.;Chang, Y.-W.; Lin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:55Z |
High-performance global routing with fast overflow reduction
|
YAO-WEN CHANG; Qien, H.-Y.;Hsu, C.-H.;Chang, Y.-W.; Qien, H.-Y.; Hsu, C.-H.; Chang, Y.-W. |
| 臺大學術典藏 |
2018-09-10T07:36:55Z |
Floorplanning
|
Chen, T.-C.;Chang, Y.-W.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:55Z |
Essential issues in analytical placement algorithms
|
Chang, Y.-W.;Jiang, Z.-W.;Chen, T.-C.; Chang, Y.-W.; Jiang, Z.-W.; Chen, T.-C.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Thermal-driven analog placement considering device matching
|
Lin, P.-H.;Zhang, H.;Wong, M.D.F.;Chang, Y.-W.; Lin, P.-H.; Zhang, H.; Wong, M.D.F.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
T-trees: A tree-based representation for temporal and three-dimensional floorplanning
|
Yuh, P.-H.;Yang, C.-L.;Chang, Y.-W.; Yuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Spare-cell-aware multilevel analytical placement
|
Jiang, Z.-W.;Hsu, M.-K.;Chang, Y.-W.;Chao, K.-Y.; Jiang, Z.-W.; Hsu, M.-K.; Chang, Y.-W.; Chao, K.-Y.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Simultaneous layout migration and decomposition for double patterning technology
|
Hsu, C.-H.;Chang, Y.-W.;Nassif, S.R.; Hsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Routing for manufacturability and reliability
|
Chen, H.-Y.;Chang, Y.-W.; Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T07:36:54Z |
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
|
Lee, W.-P.;Marculescu, D.;Chang, Y.-W.; Lee, W.-P.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG |
显示项目 161-185 / 348 (共14页)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
每页显示[10|25|50]项目
|
