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"yao wen chang"的相關文件
顯示項目 91-100 / 348 (共35頁)
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| 臺大學術典藏 |
2018-09-10T14:57:59Z |
NTUplace4h: A novel routability-driven placement algorithm for hierarchical mixed-size circuit designs
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Hsu, M.-K.;Chen, Y.-F.;Huang, C.-C.;Chou, S.;Lin, T.-H.;Chen, T.-C.;Chang, Y.-W.; Hsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chou, S.; Lin, T.-H.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T14:57:59Z |
Nonuniform multilevel analog routing with matching constraints
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Ou, H.-C.;Chien, H.-C.C.;Chang, Y.-W.; Ou, H.-C.; Chien, H.-C.C.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T14:57:59Z |
Functional ECO using metal-configurable gate-array spare cells
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Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T14:57:59Z |
Buffered clock tree synthesis considering self-heating effects
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Lin, C.-W.;Hsu, T.-H.;Shih, X.-W.;Chang, Y.-W.; Lin, C.-W.; Hsu, T.-H.; Shih, X.-W.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T14:57:59Z |
A novel layout decomposition algorithm for triple patterning lithography
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Fang, S.-Y.;Chang, Y.-W.;Chen, W.-Y.; Fang, S.-Y.; Chang, Y.-W.; Chen, W.-Y.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Escape routing for staggered-pin-array PCBs
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Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG; Ho, Y.-K.; Ho, Y.-K.;Lee, H.-C.;Chang, Y.-W. |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
ECO optimization using metal-configurable gate-array spare cells
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Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Double patterning lithography-aware analog placement
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Chien, H.-C.C.;Ou, H.-C.;Chen, T.-C.;Kuan, T.-Y.;Chang, Y.-W.; Chien, H.-C.C.; Ou, H.-C.; Chen, T.-C.; Kuan, T.-Y.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Coupling-Aware length-ratio-matching routing for capacitor arrays in analog integrated circuits
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Ho, K.-H.;Ou, H.-C.;Chang, Y.-W.;Tsao, H.-F.; Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
An efficient and effective analytical placer for FPGAs
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YAO-WEN CHANG; Chang, Y.-W.; Banerjee, P.; Lin, T.-H.; Lin, T.-H.;Banerjee, P.;Chang, Y.-W. |
顯示項目 91-100 / 348 (共35頁)
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