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"yeh f s"的相关文件
显示项目 16-25 / 44 (共5页)
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| 國立交通大學 |
2017-04-21T06:49:53Z |
Novel Ultra-Low Power RRAM with Good Endurance and Retention
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Cheng, C. H.; Chin, Albert; Yeh, F. S. |
| 國立交通大學 |
2017-04-21T06:48:52Z |
Good 150 degrees C Retention and Fast Erase Characteristics in Charge-Trap-Engineered Memory having a Scaled Si3N4 Layer
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Lin, S. H.; Chin, Albert; Yeh, F. S.; McAlister, S. P. |
| 國立交通大學 |
2014-12-08T15:48:24Z |
Ultralow-Power Ni/GeO/STO/TaN Resistive Switching Memory
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Cheng, C. H.; Chin, Albert; Yeh, F. S. |
| 國立交通大學 |
2014-12-08T15:40:20Z |
Flat band voltage control on low V(t) metal-gate/high-kappa CMOSFETs with small EOT
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Chin, Albert; Chang, M. F.; Lin, S. H.; Chen, W. B.; Lee, P. T.; Yeh, F. S.; Liao, C. C.; Li, M. -F.; Su, N. C.; Wang, S. J. |
| 國立交通大學 |
2014-12-08T15:39:20Z |
Highly-Scaled 3.6-nm ENT Trapping Layer MONOS Device with Good Retention and Endurance
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Tsai, C. Y.; Lee, T. H.; Chin, Albert; Wang, Hong; Cheng, C. H.; Yeh, F. S. |
| 國立交通大學 |
2014-12-08T15:37:36Z |
Stacked GeO/SrTiO(x) Resistive Memory with Ultralow Resistance Currents
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Cheng, C. H.; Chin, Albert; Yeh, F. S. |
| 國立交通大學 |
2014-12-08T15:36:27Z |
Improved Device Characteristics in Charge-Trapping-Engineered Flash Memory Using High-kappa Dielectrics
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Chin, Albert; Lin, S. H.; Tsai, C. Y.; Yeh, F. S. |
| 國立交通大學 |
2014-12-08T15:29:30Z |
Bipolar switching characteristics of low-power Geo resistive memory
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Cheng, C. H.; Chen, P. C.; Liu, S. L.; Wu, T. L.; Hsu, H. H.; Chin, Albert; Yeh, F. S. |
| 國立交通大學 |
2014-12-08T15:23:32Z |
Highly uniform low-power resistive memory using nitrogen-doped tantalum pentoxide
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Cheng, C. H.; Chen, P. C.; Wu, Y. H.; Wu, M. J.; Yeh, F. S.; Chin, Albert |
| 國立交通大學 |
2014-12-08T15:23:05Z |
Size-Dependent Trapping Effect in Nano-Dot Non-Volatile Memory
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Tsai, C. Y.; Cheng, C. H.; Chang, T. Y.; Chou, K. Y.; Chin, Albert; Yeh, F. S. |
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