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"yeh wen kuan"的相關文件
顯示項目 36-45 / 79 (共8頁)
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| 國立高雄大學 |
2010-08 |
External Stresses on Tensile and Compressive Contact Etching Stop Layer SOI MOSFETs
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Chang, Wen-Teng; Wang, Chih-Chung; Lin, Jian-An; Yeh, Wen-Kuan |
| 國立高雄大學 |
2010-02 |
The Impact of Oxide Traps Induced by SOI Thickness on Reliability of Fully Silicide Metal-Gate Strained SOI MOSFET
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Lin, Cheng-Li; Chen, Yu-Ting; Huang, Fon-Shan; Yeh, Wen-Kuan; Lin, Chien-Ting |
| 國立高雄大學 |
2010 |
Improvement of TDDB reliability, characteristics of HfO2 high-k/metal gate MOSFET device with oxygen post deposition annealing
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Chen, Chun-Yu; Chiang, Yen-Ting; Juang, Feng-Renn; Lin, Chien-Ting; Lai, Chien-Ming |
| 國立高雄大學 |
2009-07 |
Effect of Nitrogen Incorporation in a Gd Cap Layer on the Reliability of Deep-Submicrometer Hf-Based High-k/Metal-Gate nMOSFETs
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Chen, Chun-Yu; Lin, Chien-Ting; Hsu, Che-Hua; Cheng, Li-Wei; Lai, Chien-Ming |
| 國立成功大學 |
2009-07 |
Effect of Nitrogen Incorporation in a Gd Cap Layer on the Reliability of Deep-Submicrometer Hf-Based High-k/Metal-Gate nMOSFETs
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Chen, Chun-Yu; Lin, Chien-Ting; Hsu, Che-Hua; Cheng, Li-Wei; Lai, Chien-Ming |
| 國立高雄大學 |
2009-03 |
The Impact of Strain Technology on FUSI Gate SOI CMOSFET
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Yeh, Wen-Kuan; Wang, Jean-An; Tsai, Ming-Hsing; Lin, Chien-Ting; Chen, Po-Ying |
| 國立成功大學 |
2008-11 |
Significantly improving sub-90 nm CMOSFET performances with notch-gate enhanced high tensile-stress contact etch stop layer
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Hsu, Chia-Wei; Fang, Yean-Kuen; Yeh, Wen-Kuan; Lin, Chien-Ting |
| 國立高雄大學 |
2008-10 |
Significant improvement of 45 nm and beyond complementary metal oxide semiconductor field effect transistor performance with fully silicided and ultimate spacer process technology
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Hsu, Chia-Wei; Fang, Yean-Kuen; Lin, Chien-Ting; Yeh, Wen-Kuan; Hsu, Che-Hua; Lai, Chieh-Ming; Cheng, Li-Wei; Ma, Mike |
| 國立成功大學 |
2008-09-01 |
Significant improvement of 45 nm and beyond complementary metal oxide semiconductor field effect transistor performance with fully silicided and ultimate spacer process technology
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Hsu, Chia-Wei; Fang, Yean-Kuen; Lin, Chien-Ting; Yeh, Wen-Kuan; Hsu, Che-Hua; Lai, Chieh-Ming; Cheng, Li-Wei; Ma, Mike |
| 國立成功大學 |
2008-08 |
A high current gain gate-controlled lateral bipolar junction transistor with 90 nm CMOS technology for future RF SoC applications
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Chen, Shuo-Mao; Fang, Yean-Kuen; Yeh, Wen-Kuan; Lee, I. C.; Chiang, Yen-Ting |
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