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Showing items 31-55 of 80 (4 Page(s) Totally)
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Institution	Date	Title	Author
國立中山大學	2008-08	Simulation of the Multi-Source/Drain SOI MOSFET	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學	2008-06	Short-channel Characteristics of Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs	Jyi-Tsong Lin;Yi-Chuen Eng;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin
國立中山大學	2008-06	An SOI-based Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer	Yi-Chuen Eng;Jyi-Tsong Lin;Shiang-Shi Kang
國立中山大學	2008-06	An Advanced Non-classical Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer to Ease Ultra-shallow Junction Requirement	Jyi-Tsong Lin;Yi-Chuen Eng;Ying-Chieh Tsai;Hung-Jen Tseng;Yi-Ming Tseng;Po-Hsieh Lin
國立中山大學	2008-06	A Study of LBO Effects in a 40 nm SA-MSCFET	Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學	2008-05	Analysis of Block Oxide Height Variations for a 40nm Gate Length bFDSOI-FET	Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學	2008-05	The Influence of the Source/drain-tie Length on the SOI Based Transistors	Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學	2008-05	The Effect of Block Oxide Height on a Self-aligned Source/Drain-tied nBOFET	Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Po-Hsieh Lin;Yi-Ming Tzeng;Jeng-Da Lin
國立中山大學	2008-05	Source/Drain-tied Bottom Gate MOSFET for Device Reliability Improvement	Jeng-Da Lin;Jyi-Tsong Lin;Kung-Kai Kao;Shiang-Shi Kang;Yi-Chuen Eng;Po-Hsieh Lin
國立中山大學	2008-05	A Novel Vertical Sidewall MOSFET Using Smart Source/Body Contact without Floating-Body Effect	Tai-Yi Lee;Jyi-Tsong Lin;Yi-Chuen Eng;Kao-Cheng Lin
國立中山大學	2008-05	Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs	Yi-Chuen Eng;Jyi-Tsong Lin;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin;Kung-Kai Kao
國立中山大學	2008-05	A Novel Vertical Sidewall MOSFETs Using Smart Source/Body Contact without Floating-Body Effect	Tai-Yi Lee;Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學	2008-05	A Novel Pseudo Tri-Gate VMOS for Enhancing Thermal Stability	Jyi-Tsong Lin;Ying-Chieh Tsai;Yi-Chuen Eng
國立中山大學	2008-05	The Study of Influence of the Source/drain-tie Length in a S/D tie SOI for Improving Self-Heating	Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學	2008-05	Misalignment of the gate to the body in a bSPIFET	Jyi-Tsong Lin;Hung-Jen Tseng;Yi-Chuen Eng;Yi-Ming Tseng;Shiang-Shi Kang;Ying-Chieh Tasi
國立中山大學	2008-05	A Novel Multi-Source/Drain SOI MOSFET	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Ying-Chieh Tasi;Hung-Jen Tseng;Yi-Ming Tseng
國立中山大學	2008-05	The Influence of the Source/drain-tie Length on the SOI Based Transistors	Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng;Yi-Ming Tseng;Ying-Chieh Tsai;Hung-Jen Tseng
國立中山大學	2008-05	A Novel SOI MOSFET with Multi-Source/Drain	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學	2007-12	A Novel Blocking Technology for Improving the Short-Channel Effects in Polycrystalline Silicon TFT Devices	Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學	2007-12	Misalignment of the Block Oxide Height in Self-aligned Source/Drain-tied bFDSOI-FET	Jyi-Tsong Lin;Yi-Chuen Eng;Kung-Kai Kao;Hau-Yuan Huang;Jeng-Da Lin;Shiang-Shi Kang
國立中山大學	2007-11	Influence of Block Oxide Width on a Silicon on Partial Insulator Field-Effect Transistor	Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學	2007-11	A Novel Middle-Gate-Double-Channel FET for high Reliability Use	Hau-Yuan Huang;Jyi-Tsong Lin;Yi-Chuen Eng;Jeng-Da Lin;Kung-Kai Kao
國立中山大學	2007-11	Characteristics Study of Pillar Field-Effect Transistor for Future High Reliability application	Jyi-Tsong Lin;Kung-Kai Kao;Jeng-Da Lin;Yi-Chuen Eng;Shiang-Shi Kang;Hau-Yuan Huang
國立中山大學	2007-09	Improvement of Self-heating Effects in Nanoscale Multi-substrate Contact Field-effect Transistors	Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學	2007-09	Self-aligned Block Oxide Process for bSPIFETs	Jyi-Tsong Lin;Yi-Chuen Eng

Showing items 31-55 of 80 (4 Page(s) Totally)
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