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显示项目 11-60 / 80 (共2页)
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机构 日期 题名 作者
國立中山大學 2009-05 A Novel Poly-silicon Thin-Film Transistor with Multi-Trenched Body Formed by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo;Hsuan-Hsu Chen
國立中山大學 2009-05 Self-Aligned Block-Oxide Quasi-SOI MOSFETs with S/D-Tie Chih-Hung Sun; Jyi-Tsong Lin; Yi-Chuen Eng; Tzu-Feng Chang; Po-Hiesh Lin; Hsuan-Hsu Chen; Chih-Hao Kuo; Hsien-Nan Chiu
國立中山大學 2009-05 A Novel Double Gate MOSFET with Self-Align Process and Source/Drain Tie Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2009-05 An Improved Vertical Embedded Sidewall-Gate MOSFET for Reducing Parasitic Capacitance and Suppressing Kink Effects Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang
國立中山大學 2009-05 Simulation Study of Novel FinFET Devices with connected body Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2009-05 Future of Planar Self-Aligned Block Oxide Based MOSFET Technology Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hao Kuo;Tzu-Feng Chang;Chih-Hung Sun;Po-Hsieh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen
國立中山大學 2009-05 A Novel Poly-Si Thin-Film Transistor with Multi-Trenched Body by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo;Hsuan-Hsu Chen
國立中山大學 2009-05 A Novel Double Gate MOSFET with Self-align Process and Source/Drain Tie Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-04 A Vertical Transistor with Embedded Gate for Reducing Parasitic Overlap Capacitance Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang
國立中山大學 2009-04 A Novel Polysilicon Thin-Film Transistor with Multi-Trenched Body by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang
國立中山大學 2009-04 Study of bMOS and bMPI for 25 nm technology node Chih-Hung Sun; Jyi-Tsong Lin; Yi-Chuen Eng; Tzu-Feng Chang; Po-Hiesh Lin; Hsuan-Hsu Chen; Chih-Hao Kuo; Hsien-Nan Chiu
國立中山大學 2009-04 Self-Aligned Silicon-On-Insulator Transistors with Ω-Shaped Conductive Layer and Source/Drain-Tie: A Simulation Study Tzu-Feng Chang;Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hao Kuo;Chih-Hung Sun;Po-Hiesh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen
國立中山大學 2009-04 A New Novel FinFET Device Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-04 A Simulation Study of Source/Drain-Tie Effects on the Short-Channel Characteristics of SA-ΠFETs Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-03 Study of New Novel FinFET Device with Its Bodies been Connected Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2008-10 The Influence of the Source/Drain-tie Length in a Novel Self-Aligned S/D tie SOI for Improving Self-heating Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng;Yi-Ming Tseng;Ying-Chieh Tasi;Hung-Jen Tseng
國立中山大學 2008-10 Thermal Stability of a High Performance PTGVMOS with Native-tie Ying-Chieh Tsai;Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Yi-Ming Tseng;Hung-Jen Tseng
國立中山大學 2008-10 A New Process for Self-aligned Silicon-On-Insulator with Block Oxide and Its Memory Application for 1T-DRAM Yi-Ming Tseng;Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Hung-Jen Tseng;Ying-Chieh Tsai
國立中山大學 2008-10 Misalignment Issue between the Si-body and the Gate of a 30nm bSPIFET Hung-Jen Tseng;Jyi-Tsong Lin;Yi-Chuen Eng;Bao-Tang Jheng;Yi-Ming Tseng;Shiang-Shi Kang
國立中山大學 2008-08 A Novel Pseudo Tri-Gate Vertical MOSFET with Source/Drain tie Jyi-Tsong Lin;Ying-Chieh Tsai;Yi-Chuen Eng;Yi-Ming Tseng;Shiang-Shi Kang
國立中山大學 2008-08 Simulation of the Multi-Source/Drain SOI MOSFET Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學 2008-06 Short-channel Characteristics of Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs Jyi-Tsong Lin;Yi-Chuen Eng;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin
國立中山大學 2008-06 An SOI-based Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer Yi-Chuen Eng;Jyi-Tsong Lin;Shiang-Shi Kang
國立中山大學 2008-06 An Advanced Non-classical Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer to Ease Ultra-shallow Junction Requirement Jyi-Tsong Lin;Yi-Chuen Eng;Ying-Chieh Tsai;Hung-Jen Tseng;Yi-Ming Tseng;Po-Hsieh Lin
國立中山大學 2008-06 A Study of LBO Effects in a 40 nm SA-MSCFET Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學 2008-05 Analysis of Block Oxide Height Variations for a 40nm Gate Length bFDSOI-FET Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2008-05 The Influence of the Source/drain-tie Length on the SOI Based Transistors Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學 2008-05 The Effect of Block Oxide Height on a Self-aligned Source/Drain-tied nBOFET Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Po-Hsieh Lin;Yi-Ming Tzeng;Jeng-Da Lin
國立中山大學 2008-05 Source/Drain-tied Bottom Gate MOSFET for Device Reliability Improvement Jeng-Da Lin;Jyi-Tsong Lin;Kung-Kai Kao;Shiang-Shi Kang;Yi-Chuen Eng;Po-Hsieh Lin
國立中山大學 2008-05 A Novel Vertical Sidewall MOSFET Using Smart Source/Body Contact without Floating-Body Effect Tai-Yi Lee;Jyi-Tsong Lin;Yi-Chuen Eng;Kao-Cheng Lin
國立中山大學 2008-05 Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs Yi-Chuen Eng;Jyi-Tsong Lin;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin;Kung-Kai Kao
國立中山大學 2008-05 A Novel Vertical Sidewall MOSFETs Using Smart Source/Body Contact without Floating-Body Effect Tai-Yi Lee;Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2008-05 A Novel Pseudo Tri-Gate VMOS for Enhancing Thermal Stability Jyi-Tsong Lin;Ying-Chieh Tsai;Yi-Chuen Eng
國立中山大學 2008-05 The Study of Influence of the Source/drain-tie Length in a S/D tie SOI for Improving Self-Heating Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學 2008-05 Misalignment of the gate to the body in a bSPIFET Jyi-Tsong Lin;Hung-Jen Tseng;Yi-Chuen Eng;Yi-Ming Tseng;Shiang-Shi Kang;Ying-Chieh Tasi
國立中山大學 2008-05 A Novel Multi-Source/Drain SOI MOSFET Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Ying-Chieh Tasi;Hung-Jen Tseng;Yi-Ming Tseng
國立中山大學 2008-05 The Influence of the Source/drain-tie Length on the SOI Based Transistors Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng;Yi-Ming Tseng;Ying-Chieh Tsai;Hung-Jen Tseng
國立中山大學 2008-05 A Novel SOI MOSFET with Multi-Source/Drain Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2007-12 A Novel Blocking Technology for Improving the Short-Channel Effects in Polycrystalline Silicon TFT Devices Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-12 Misalignment of the Block Oxide Height in Self-aligned Source/Drain-tied bFDSOI-FET Jyi-Tsong Lin;Yi-Chuen Eng;Kung-Kai Kao;Hau-Yuan Huang;Jeng-Da Lin;Shiang-Shi Kang
國立中山大學 2007-11 Influence of Block Oxide Width on a Silicon on Partial Insulator Field-Effect Transistor Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-11 A Novel Middle-Gate-Double-Channel FET for high Reliability Use Hau-Yuan Huang;Jyi-Tsong Lin;Yi-Chuen Eng;Jeng-Da Lin;Kung-Kai Kao
國立中山大學 2007-11 Characteristics Study of Pillar Field-Effect Transistor for Future High Reliability application Jyi-Tsong Lin;Kung-Kai Kao;Jeng-Da Lin;Yi-Chuen Eng;Shiang-Shi Kang;Hau-Yuan Huang
國立中山大學 2007-09 Improvement of Self-heating Effects in Nanoscale Multi-substrate Contact Field-effect Transistors Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學 2007-09 Self-aligned Block Oxide Process for bSPIFETs Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2007-07 Advanced π-FET Technology for 45 nm Technology Node Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學 2007-06 Oxide Islands Design for Elimination of Ultra-shallow Junction Formation Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2007-05 Source/Drain-Tied Poly-Si Thin-Film Transistor with Π-Shaped Active Region for Device Reliability Improvement Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-05 Self-aligned Block Oxide Process for bFDSOI Devices Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學 2007-05 Misalignment of the Block Oxide Height in Self-Aligned bSPIFET Jyi-Tsong Lin;Yi-Chuen Eng

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