|
English
|
正體中文
|
简体中文
|
2818744
|
|
???header.visitor??? :
28299656
???header.onlineuser??? :
517
???header.sponsordeclaration???
|
|
|
|
???tair.name??? >
???browser.page.title.author???
|
"you wei xiang"???jsp.browse.items-by-author.description???
Showing items 1-15 of 15 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 國立交通大學 |
2020-10-05T02:01:28Z |
Electrostatic Integrity in Negative-Capacitance FETs - A Subthreshold Modeling Approach
|
Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2020-02-02T23:55:33Z |
Evaluation of 2D Negative-Capacitance FETs for Low-Voltage SRAM Applications
|
Tseng, Kuei-Yang; You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2020-02-02T23:55:33Z |
Device Structural Effects, SPICE Modeling and Circuit Evaluation for Negative-Capacitance FETs
|
Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2020-01-01 |
A New 8T Hybrid Nonvolatile SRAM With Ferroelectric FET
|
Hu, Chenming; Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2019-10-05T00:08:43Z |
Depolarization Field in Ferroelectric Nonvolatile Memory Considering Minor Loop Operation
|
You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Evaluation of NC-FinFET Based Subsystem-Level Logic Circuits Using SPICE Simulation
|
You, Wei-Xiang; Su, Pin; Hu, Chenming |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Investigation of Short-Channel Effects in 2D Negative-Capacitance Field-Effect Transistors
|
You, Wei-Xiang; Tsai, Chih-Peng; Su, Pin |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Device Structural Effects on Negative-Capacitance FETs
|
Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2019-05-02T00:25:52Z |
Evaluation of NC-FinFET Based Subsystem-Level Logic Circuits
|
You, Wei-Xiang; Su, Pin; Hu, Chenming |
| 國立交通大學 |
2019-04-02T06:00:45Z |
Intrinsic Difference Between 2-D Negative-Capacitance FETs With Semiconductor-on-Insulator and Double-Gate Structures
|
You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Investigation and Comparison of Design Space for Ultra-Thin-Body GeOI/SOI Negative Capacitance FETs
|
Lee, Ho-Pei; Yu, Chien-Lin; You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Design Space Exploration Considering Back-Gate Biasing Effects for Negative-Capacitance Transition-Metal-Dichalcogenide (TMD) Field-Effect Transistors
|
You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:54:20Z |
Design Space Exploration Considering Back-Gate Biasing Effects for 2D Negative-Capacitance Field-Effect Transistors
|
You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2018-08-21T05:53:27Z |
Short-Channel Effects in 2D Negative-Capacitance Field-Effect Transistors
|
You, Wei-Xiang; Tsai, Chih-Peng; Su, Pin |
| 國立交通大學 |
2017-04-21T06:56:35Z |
A Compact Subthreshold Model for Short-Channel Monolayer Transition Metal Dichalcogenide Field-Effect Transistors
|
You, Wei-Xiang; Su, Pin |
Showing items 1-15 of 15 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
