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Showing items 1-10 of 15 (2 Page(s) Totally)
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| 國立交通大學 |
2020-10-05T02:01:28Z |
Electrostatic Integrity in Negative-Capacitance FETs - A Subthreshold Modeling Approach
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Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2020-02-02T23:55:33Z |
Evaluation of 2D Negative-Capacitance FETs for Low-Voltage SRAM Applications
|
Tseng, Kuei-Yang; You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2020-02-02T23:55:33Z |
Device Structural Effects, SPICE Modeling and Circuit Evaluation for Negative-Capacitance FETs
|
Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2020-01-01 |
A New 8T Hybrid Nonvolatile SRAM With Ferroelectric FET
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Hu, Chenming; Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2019-10-05T00:08:43Z |
Depolarization Field in Ferroelectric Nonvolatile Memory Considering Minor Loop Operation
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You, Wei-Xiang; Su, Pin |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Evaluation of NC-FinFET Based Subsystem-Level Logic Circuits Using SPICE Simulation
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You, Wei-Xiang; Su, Pin; Hu, Chenming |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Investigation of Short-Channel Effects in 2D Negative-Capacitance Field-Effect Transistors
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You, Wei-Xiang; Tsai, Chih-Peng; Su, Pin |
| 國立交通大學 |
2019-05-02T00:26:47Z |
Device Structural Effects on Negative-Capacitance FETs
|
Su, Pin; You, Wei-Xiang |
| 國立交通大學 |
2019-05-02T00:25:52Z |
Evaluation of NC-FinFET Based Subsystem-Level Logic Circuits
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You, Wei-Xiang; Su, Pin; Hu, Chenming |
| 國立交通大學 |
2019-04-02T06:00:45Z |
Intrinsic Difference Between 2-D Negative-Capacitance FETs With Semiconductor-on-Insulator and Double-Gate Structures
|
You, Wei-Xiang; Su, Pin |
Showing items 1-10 of 15 (2 Page(s) Totally)
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