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"yu chang hung"的相关文件
显示项目 11-20 / 33 (共4页)
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| 國立交通大學 |
2017-04-21T06:49:30Z |
Investigation and Benchmark of Intrinsic Drain-Induced-Barrier-Lowering (DIBL) for Ultra-Thin-Body III-V-on-Insulator n-MOSFETs
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Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2017-04-21T06:49:25Z |
Stability Optimization of Monolithic 3-D MoS2-n/WSe2-p SRAM Cells for Superthreshold and Near-/Sub-threshold Applications
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Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:49:25Z |
Performance Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits
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Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立臺灣海洋大學 |
2017 |
藉由分子堆疊調控放光波長
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Yu, Chang-Hung; 余長鴻 |
| 國立交通大學 |
2016-03-28T00:04:24Z |
Evaluation of Monolayer and Bilayer 2-D Transition Metal Dichalcogenide Devices for SRAM Applications
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Yu, Chang-Hung; Fan, Ming-Long; Yu, Kuan-Chin; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2016-03-28T00:04:17Z |
Impact of Quantum Capacitance on Intrinsic Inversion Capacitance Characteristics and Inversion-Charge Loss for Multigate III-V-on-Insulator nMOSFETs
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Shen, Hsin-Hung; Shen, Shih-Lun; Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2015-07-21T08:31:30Z |
Investigation of Backgate-Bias Dependence of Intrinsic Variability for UTB Hetero-Channel MOSFETs Considering Quantum Confinement
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Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2015-07-21T08:29:05Z |
Investigation of Multi-V-th Efficiency for Trigate GeOI p-MOSFETs Using Analytical Solution of 3-D Poisson\'s Equation
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Wu, Shu-Hua; Yu, Chang-Hung; Chiang, Chun-Hsien; Su, Pin |
| 國立交通大學 |
2014-12-12T01:46:22Z |
量子侷限效應對超薄絕緣鍺與砷化銦鎵金氧半場效電晶體的次臨界與後端閘極偏壓調變臨界電壓特性之理論研究
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余昌鴻; Yu, Chang-Hung; 蘇彬; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:50Z |
Built-in Effective Body-Bias Effect in Ultra-Thin-Body Hetero-Channel III-V-on-Insulator n-MOSFETs
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Yu, Chang-Hung; Su, Pin |
显示项目 11-20 / 33 (共4页)
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