|
English
|
正體中文
|
简体中文
|
總筆數 :2856708
|
|
造訪人次 :
53582874
線上人數 :
754
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"yu chang hung"的相關文件
顯示項目 1-10 / 33 (共4頁)
1 2 3 4 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2019-12-13T01:12:54Z |
Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells
|
Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2019-04-03T06:44:23Z |
New Findings on the Drain-Induced Barrier Lowering Characteristics for Tri-Gate Germanium-on-Insulator p-MOSFETs
|
Wu, Shu-Hua; Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2019-04-03T06:35:52Z |
Theoretical Investigation of DIBL Characteristics for Scaled Tri-Gate InGaAs-OI n-MOSFETs Including Sensitivity to Process Variations
|
Wu, Shu-Hua; Yu, Chien-Lin; Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Evaluation of Analog Performance of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) MOSFETs
|
Lee, Hung-Yi; Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Performance Evaluation of Pass-Transistor-Based Circuits using Monolayer and Bilayer 2-D Transition Metal Dichalcogenide (TMD) MOSFETs for 5.9nm Node
|
Yu, Chang-Hung; Zheng, Jun-Teng; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:53:58Z |
Performance and Stability Benchmarking of Monolithic 3-D Logic Circuits and SRAM Cells With Monolayer and Few-Layer Transition Metal Dichalcogenide MOSFETs
|
Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-01-24T07:38:51Z |
超薄絕緣層異質三五族與鍺通道金氧半場效電晶體及單層與多層二維過渡金屬硫屬化合物之邏輯電路及靜態隨機存取記憶體之研究與分析
|
余昌鴻; 蘇彬; Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2017-04-21T06:56:15Z |
Impact of Random Variations on Cell Stability and Write-Ability of Low-Voltage SRAMs Using Monolayer and Bilayer Transition Metal Dichalcogenide (TMD) MOSFETs
|
Yu, Chang-Hung; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:50:14Z |
Anomalous Electrostatics and Intrinsic Variability in GeOI p-MOSFET
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2017-04-21T06:49:44Z |
Built-in Effective Body-Bias Effect in UTBB Hetero-Channel MOSFETs and Its Suppression
|
Yu, Chang-Hung; Su, Pin |
顯示項目 1-10 / 33 (共4頁)
1 2 3 4 > >>
每頁顯示[10|25|50]項目
|
