臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T05:29:23Z	Wave-Pipelined On-Chip Global Interconnect	Lizheng Zhang; Yu-Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T05:29:23Z	Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model	Lizheng Zhang; Weijen Chen; Yu-Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:54Z	Statistical Timing Analysis with AMECT: Asymptotic MAX/MIN Approximation and Extended Canonical Timing Model	Lizheng Zhang; Yu-Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
臺大學術典藏	2018-09-10T04:59:53Z	Statistical Timing Analysis in Sequential Circuit for On-Chip Global Interconnect Pipelining	Lizheng Zhang; Yu Hen Hu; Charlie Chung-Ping Chen; CHUNG-PING CHEN
國立臺灣海洋大學	2010-07	ARAL-CR: An Adaptive Reasoning And Learning Cognitive Radio Platform	Sao-Jie Chen;Pao-Ann Hsiung;Chu Yu;Mao-Hsu Yen;Sezer S.;Schulte M.;Yu-Hen Hu
國立臺灣海洋大學	2010-06	Perfect Shuffling for Cycle Efficient Puncturer and Interleaver for Software Defined Radio	Jui-Chieh Lin; Minja Hsieh; Ming-Jung Fan-Chiang; Sung-Yen Mao; Chu Yu; Sao-Jie Chen; Yu Hen Hu
國立臺灣海洋大學	2009-07	Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture	Jui-Chieh Lin;Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen;Yu Hen Hu
國立中山大學	2005-08	Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學	2004-02	A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang
國立中山大學	2003-08	High-Radix Low-Complexity Architectures for Long-Length DCT Using Conventional Arithmetic and ROM-Based Distributed Arithmeti c	Shen-Fu Hsiao; Yu-Hen Hu

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