臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
元智大學	2018-03-19	Efficient Synthesis of Approximate Threshold Logic Circuits with an Error Rate Guarantee	陳勇志; Yung-An Lai; Chia-Chun Lin; Chia-Cheng Wu; Chun-Yao Wang
亞洲大學	2005	Distributed Data Integration Implementation and EIS for 3C Industry	yung-an lai

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