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教育部委托研究计画 计画执行:国立台湾大学图书馆
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"zhan c z"的相关文件
显示项目 26-32 / 32 (共2页)
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每页显示[10|25|50]项目
| 臺大學術典藏 |
2018-09-10T07:37:58Z |
A real-time programmable LDPC decoder chip for arbitrary QC-LDPC parity check matrices
|
Shih, X.-Y.;Zhan, C.-Z.;Wu, A.-Y.; Shih, X.-Y.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:37:58Z |
A real-time programmable LDPC decoder chip for arbitrary QC-LDPC parity check matrices
|
Shih, X.-Y.;Zhan, C.-Z.;Wu, A.-Y.; Shih, X.-Y.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:04:43Z |
High-performance scheduling algorithm for partially parallel LDPC decoder
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Zhan, C.-Z.; Shih, X.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:04:42Z |
An 8.29 mm2 52 mW multi-mode LDPC decoder design for mobile WiMAX system in 0.13 μm CMOS process
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Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:04:42Z |
Cost-effective echo and NEXT canceller designs for 10GBASE-T ethernet system
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Chen, Y.-L.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T07:04:41Z |
A 7.39mm2 76mw (1944, 972) LDPC decoder chip for IEEE 802.11n applications
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AN-YEU(ANDY) WU; Shih, X.-Y.; Zhan, C.-Z.; Wu, A.-Y. |
| 臺大學術典藏 |
2018-09-10T06:31:52Z |
A 19-mode 8.29mm2 52-mW LDPC decoder chip for IEEE 802.16e system
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Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
显示项目 26-32 / 32 (共2页)
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