臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T07:42:00Z	A 43.7mW 96GHz phase-locked loop in 65nm CMOS technology	Kun-Hung Tsai;Shen-Iuan Liu; Kun-Hung Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:00Z	A wireless power telemetry with self-calibrated resonant frequency	SHEN-IUAN LIU; Shen-Iuan Liu; Wei-Jen Huang;Chein-Lung Chen;Shen-Iuan Liu; Wei-Jen Huang; Chein-Lung Chen
臺大學術典藏	2018-09-10T07:42:00Z	A frequency synthesizer for mode-1 MB-OFDM UWB applications	Jung-Yu Chang;Che-Wei Fan;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:00Z	An all-digital clock generator for dynamic frequency scaling	Wei-Ming Lin;Chao-Chyun Chen;Shen-Iuan Liu; Wei-Ming Lin; Chao-Chyun Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:00Z	A 140MS/s 10-bit Pipelined ADC with a Folded S/H Stage	Hwei-Yu Lee;Shen-Iuan Liu; Hwei-Yu Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:00Z	A 132.7-to-143.5GHz injection-locked frequency divider in 65nm CMOS	Bo-Yu Lin;Shen-Iuan Liu; Bo-Yu Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:01Z	A 40Gb/s decision feedback equalizer using back-gate feedback technique	Chang-Lin Hsieh;Shen-Iuan Liu; Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:01Z	A 10Gb/s inductorless quarter-rate clock and data recovery circuit in 0.13um CMOS	Hong-Lin Chu, Chang-Lin Hsieh;Shen-Iuan Liu; Hong-Lin Chu, Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:01Z	A CBSC second-order sigma-delta modulator in 3μm LTPS-TFT technology	Wei-Ming Lin;Chan-Fei Lin;Shen-Iuan Liu; Wei-Ming Lin; Chan-Fei Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T07:42:01Z	A delay-locked loop with digital background calibration	Wei-Ming Lin;Kuang-Fu Teng;Shen-Iuan Liu; Wei-Ming Lin; Kuang-Fu Teng; Shen-Iuan Liu; SHEN-IUAN LIU

Showing items 1992396-1992405 of 2346973 (234698 Page(s) Totally)
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