臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 1996681-1996690 of 2348978 (234898 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T08:19:07Z	Power supply noise reduction in broadcast-based compression environment for at-speed scan testing	C.-Y. Liang;M.-F. Wu;J.-L. Huang; C.-Y. Liang; M.-F. Wu; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏	2018-09-10T08:19:08Z	A low-power quadrature VCO and its application to a 0.6-V 2.4-GHz PLL	C.-T. Lu;H.-H. Hsieh;L.-H. Lu; C.-T. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T08:19:08Z	A 0.6-V delta-sigma ADC with 57-dB dynamic range	C.-H. Wei;L.-H. Lu; C.-H. Wei; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T08:19:08Z	A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS Technology	Yen-Chuan Huang;Tai-Cheng Lee; Yen-Chuan Huang; Tai-Cheng Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:08Z	A 320-MHz CMOS Continuous-Time ΔΣ Modulator With 5-MHz Signal Bandwidth and 8.3-bit ENOB	K-T Chen;T-C Lee; K-T Chen; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:09Z	Nonlinear R-2R Transistor-Only DAC	T-C Lee;C-H Lin; T-C Lee; C-H Lin; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:09Z	A 10-bit 100 MS/s 4.5 mW Pipelined ADC with a Time Sharing Techniques	Yen-Chuang Huang;Tai-Cheng Lee; Yen-Chuang Huang; Tai-Cheng Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:09Z	An Offset Phase-Locked Loop Spread Spectrum Clock Generator for SATA III	C-Y Lin;C-Y Chiang;T-C Lee; C-Y Lin; C-Y Chiang; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:09Z	A 300- to 800-MHz De-Skew Clock Generator for Arbitrary Delay	Y-C Hung;K Fong;T-C Lee; Y-C Hung; K Fong; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:09Z	An All‐Digital De‐skew Clock Generator for Arbitrary Wide Range Delay	K Fong;Z-Z Chen;T-C Le; K Fong; Z-Z Chen; T-C Le; TAI-CHENG LEE

Showing items 1996681-1996690 of 2348978 (234898 Page(s) Totally)
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