|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51268100
線上人數 :
611
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"顏金泰"的相關文件
顯示項目 11-20 / 100 (共10頁) << < 1 2 3 4 5 6 7 8 9 10 > >> 每頁顯示[10|25|50]項目
| 中華大學 |
2012 |
Density-Reduction-Oriented Layer Assignment for Rectangle Escape Routing
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2012 |
Top-Down-Based Symmetrical Buffered Clock Routing
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2012 |
Post-Layout OPE-Predicted Redundant Wire Insertion for Clock Skew Minimization
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2012 |
Direction-Constrained Layer Assignment for Rectangle Escape Routing
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
IO Connection Assignment and RDL Routing for Flip-Chip Designs
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
Timing-Constrained I/O Buffer Placement for Flip-Chip Designs
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
New Optimal Layer Assignment for Bus-Oriented Escape Routing
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
Obstacle-Aware Length-Matching Bus Routing
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
Pre-Assignment RDL Routing via Extraction of Maximal Net Sequence
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2011 |
Obstacle-aware multiple-source rectilinear Steiner tree with electromigration and IR-drop avoidance
|
顏金泰; YAN, JIN-TAI |
顯示項目 11-20 / 100 (共10頁) << < 1 2 3 4 5 6 7 8 9 10 > >> 每頁顯示[10|25|50]項目
|