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"chuang ching te"的相關文件
顯示項目 206-215 / 221 (共23頁)
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| 國立交通大學 |
2014-12-08T15:21:20Z |
Impacts of Single Trap Induced Random Telegraph Noise on FinFET Devices and SRAM Cell Stability
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:19Z |
Comprehensive Analysis of UTB GeOI Logic Circuits and 6T SRAM Cells considering Variability and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:19Z |
A High-Performance Low V(MIN) 55nm 512Kb Disturb-Free 8T SRAM with Adaptive VVSS Control
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Yang, Hao-I; Yang, Shih-Chi; Hsia, Mao-Chih; Lin, Yung-Wei; Lin, Yi-Wei; Chen, Chien-Hen; Chang, Chi-Shin; Lin, Geng-Cing; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang |
| 國立交通大學 |
2014-12-08T15:20:11Z |
Impacts of NBTI on SRAM Array with Power Gating Structure
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:19:54Z |
Design and Analysis of Ultra-Thin-Body SOI Based Subthreshold SRAM
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Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:19:40Z |
Asymmetrical Write-Assist for Single-Ended SRAM Operation
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Lin, Jihi-Yu; Tu, Ming-Hsien; Tsai, Ming-Chien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:12:04Z |
FinFET SRAM Cell Optimization Considering Temporal Variability Due to NBTI/PBTI, Surface Orientation and Various Gate Dielectrics
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Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:12:03Z |
Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability-A Model-Based Approach
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Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:10:57Z |
Optimal design of triple-gate devices for high-performance and low-power applications
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Chiang, Meng-Hsueh; Lin, Jeng-Nan; Kim, Keunwoo; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:10:02Z |
Selective Device Structure Scaling and Parasitics Engineering: A Way to Extend the Technology Roadmap
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Wei, Lan; Deng, Jie; Chang, Li-Wen; Kim, Keunwoo; Chuang, Ching-Te; Wong, H. -S. Philip |
顯示項目 206-215 / 221 (共23頁)
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