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"chung chung ping"
Showing items 71-80 of 82 (9 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:27:06Z |
Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration
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Wu, I-Wei; Chung, Chung-Ping; Shann, Jean Jyh-Jiun |
| 國立交通大學 |
2014-12-08T15:25:27Z |
Run-time reconfiguration scheduling of 3D-rendering on a reconfigurable system
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Chiang, Kuen-Cheng; Lee, Meng-Tho; Shann, Jean Jyh-Jiun; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:24:35Z |
Exploiting Parallelism in the H.264 Deblocking Filter by Operation Reordering
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Weng, Tsung-Hsi; Wang, Yi-Ting; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:21:18Z |
Set Utilization Based Dynamic Shared Cache Partitioning
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Deayton, Peter; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:11:42Z |
Load and storage balanced posting file partitioning for parallel information retrieval
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Ma, Yung-Cheng; Chung, Chung-Ping; Chen, Tien-Fu |
| 國立交通大學 |
2014-12-08T15:11:19Z |
Filtering of unnecessary branch predictor lookups for low-power processor architecture
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Chiao, Wei-Hau; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:10:55Z |
Instruction set extension generation with considering physical constraints
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Wu, I-Wei; Huang, Shih-Chia; Chung, Chung-Ping; Shann, Jyh-Jiun |
| 國立交通大學 |
2014-12-08T15:09:12Z |
A run-time reconfigurable fabric for 3D texture filtering
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Wang, Wei-Ting; Chen, Yi-Chi; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:03:03Z |
Mechanism for Return Stack and Branch History Corrections under Misprediction in Deep Pipeline Design
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Chiu, Guan-Ying; Yang, Hui-Chin; Li, Walter Yuan-Hwa; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:03:02Z |
Early Load: Hiding Load Latency in Deep Pipeline Processor
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Chang, Shun-Chieh; Li, Walter Yuan-Hwa; Kuo, Yuan-Jung; Chung, Chung-Ping |
Showing items 71-80 of 82 (9 Page(s) Totally)
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