| 國立交通大學 |
2014-12-08T15:27:06Z |
Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration
|
Wu, I-Wei; Chung, Chung-Ping; Shann, Jean Jyh-Jiun |
| 國立交通大學 |
2014-12-08T15:25:27Z |
Run-time reconfiguration scheduling of 3D-rendering on a reconfigurable system
|
Chiang, Kuen-Cheng; Lee, Meng-Tho; Shann, Jean Jyh-Jiun; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:24:35Z |
Exploiting Parallelism in the H.264 Deblocking Filter by Operation Reordering
|
Weng, Tsung-Hsi; Wang, Yi-Ting; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:21:18Z |
Set Utilization Based Dynamic Shared Cache Partitioning
|
Deayton, Peter; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:11:42Z |
Load and storage balanced posting file partitioning for parallel information retrieval
|
Ma, Yung-Cheng; Chung, Chung-Ping; Chen, Tien-Fu |
| 國立交通大學 |
2014-12-08T15:11:19Z |
Filtering of unnecessary branch predictor lookups for low-power processor architecture
|
Chiao, Wei-Hau; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:10:55Z |
Instruction set extension generation with considering physical constraints
|
Wu, I-Wei; Huang, Shih-Chia; Chung, Chung-Ping; Shann, Jyh-Jiun |
| 國立交通大學 |
2014-12-08T15:09:12Z |
A run-time reconfigurable fabric for 3D texture filtering
|
Wang, Wei-Ting; Chen, Yi-Chi; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:03:03Z |
Mechanism for Return Stack and Branch History Corrections under Misprediction in Deep Pipeline Design
|
Chiu, Guan-Ying; Yang, Hui-Chin; Li, Walter Yuan-Hwa; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:03:02Z |
Early Load: Hiding Load Latency in Deep Pipeline Processor
|
Chang, Shun-Chieh; Li, Walter Yuan-Hwa; Kuo, Yuan-Jung; Chung, Chung-Ping |
| 國立交通大學 |
2014-12-08T15:02:35Z |
iAIM: An Intelligent Autonomous Instruction Memory with Branch Handling Capability
|
Yang, Hui-Chin; Wang, Li-Ming; Chung, Chung-Ping |
| 中原大學 |
1996-04 |
New Mechanisms for Improving Branch Predictor Performance
|
Gau, Jih-Shiung;Chang, Si-En;Chung, Chung-Ping |
