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"chung steve s"的相关文件
显示项目 16-40 / 136 (共6页)
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| 國立交通大學 |
2018-08-21T05:57:09Z |
The Issues on the Power Consumption of Trigate FinFET: The Design and Manufacturing Guidelines
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Chung, Steve S.; Hsieh, E. R. |
| 國立交通大學 |
2018-08-21T05:57:09Z |
The Impact of TiN Barrier on the NBTI in an Advanced High-k Metal-gate p-channel MOSFET
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Huang, D. -C.; Hsieh, E. Ray; Gong, J.; Huang, C. -F.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:57:00Z |
The Guideline on Designing Face-tunneling FET for Large-scale-device Applications in IoT
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Hsieh, E. R.; Lee, J. W.; Lee, M. H.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:56:52Z |
A Novel Design of P-N Staggered Face-tunneling TFET Targeting for Low Power and Appropriate Performance Applications
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Hsieh, E. R.; Fan, Y. C.; Chang, K. Y.; Liu, C. H.; Chien, C. H.; Chung, Steve S. |
| 國立交通大學 |
2018-08-21T05:56:52Z |
Geometric Variation: A Novel Approach to Examine the Surface Roughness and the Line Roughness Effects in Trigate FinFETs
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Hsieh, E. R.; Fan, Y. C.; Liu, C. H.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R. |
| 國立交通大學 |
2018-08-21T05:53:03Z |
A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path
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Hsieh, E. Ray; Kuo, Yen Chen; Cheng, Chih-Hung; Kuo, Jing Ling; Jiang, Meng-Ru; Lin, Jian-Li; Chen, Hung-Wen; Chung, Steve S.; Liu, Chuan-Hsi; Chen, Tse Pu; Huang, Shih An; Chen, Tai-Ju; Cheng, Osbert |
| 國立交通大學 |
2018-01-24T07:42:48Z |
新穎高性能鰭式電晶體結構 及其高頻特性分析
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林建里; 莊紹勳; Lin, Jian-Li; Chung, Steve-S. |
| 國立交通大學 |
2018-01-24T07:42:00Z |
14奈米鰭式電晶體自熱效應的新穎溫度量測方法 及其對傳輸機制之影響
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江孟儒; 莊紹勳; Jiang, Meng-Ru; Chung, Steve S. |
| 國立交通大學 |
2018-01-24T07:41:58Z |
一種新穎的鰭式電晶體可程式神經陣列 在人工神經網路的應用
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陳泓文; 莊紹勳; Chen, Hung-Wen; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:56:06Z |
A theoretical and experimental evaluation of surface roughness variation in trigate metal oxide semiconductor field effect transistors
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Hsieh, E. R.; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:50:15Z |
Fully CMOS Compatible 3D Vertical RRAM with Self-aligned Self-selective Cell Enabling Sub-5nm Scaling
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Xu, Xiaoxin; Luo, Qing; Gong, Tiancheng; Lv, Hangbing; Long, Shibing; Liu, Qi; Chung, Steve S.; Li, Jing; Liu, Ming |
| 國立交通大學 |
2017-04-21T06:50:15Z |
A Comprehensive Transport Model for High Performance HEMTs Considering the Parasitic Resistance and Capacitance Effects
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Hung, C. M.; Li, K. C.; Hsieh, E. R.; Wang, C. T.; Kou, C. I.; Chang, Edward Y.; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:50:15Z |
A New Variation Plot to Examine the Interfacial-dipole Induced Work-function Variation in Advanced High-k Metal-gate CMOS Devices
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Hsieh, E. R.; Wang, Y. D.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Hsu, S. |
| 國立交通大學 |
2017-04-21T06:50:00Z |
The Experimental Demonstration of the BTI-Induced Breakdown Path in 28nm High-k Metal Gate Technology CMOS Devices
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Hsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Chang, K. Y.; Liu, C. H.; Ke, J. C.; Yang, C. W.; Tsai, C. T. |
| 國立交通大學 |
2017-04-21T06:50:00Z |
The Process and Stress-Induced Variability Issues of Trigate CMOS Devices
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Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:49:47Z |
The RTN Measurement Technique on Leakage Path Finding in Advanced High-k Metal Gate CMOS Devices
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Hsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Tsai, C. T.; Yew, T. R. |
| 國立交通大學 |
2017-04-21T06:49:45Z |
3D-TCAD Simulation Study of the Novel T-FinFET Structure for Sub-14nm Metal-Oxide-Semiconductor Field-Effect Transistor
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Chou, Chen-Han; Hsu, Chung-Chun; Chung, Steve S.; Chien, Chao-Hsin |
| 國立交通大學 |
2017-04-21T06:49:45Z |
Design of Complementary Tilt-gate TFETs with SiGe/Si and III-V Integrations Feasible for Ultra-low-power Applications
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Hsieh, E. R.; Lin, Y. S.; Zhao, Y. B.; Liu, C. H.; Chien, C. H.; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:49:28Z |
The Impact of the Three-Dimensional Gate on the Trigate FinFETs
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Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:49:14Z |
A Circuit Level Variability Prediction of Basic Logic Gates in Advanced Trigate CMOS Technology
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Hsieh, E. R.; Hung, C. M.; Wang, T. Y.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R. |
| 國立交通大學 |
2017-04-21T06:49:09Z |
An Innovative 1T1R Dipole Dynamic Random Access Memory (DiRAM) featuring High Speed, Ultra-low power, and Low Voltage Operation
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Hsieh, E. R.; Chuang, C. H.; Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:49:07Z |
Recent Advances of RTN Technique Towards the Understanding of the Gate Dielectric Reliability in Trigate FinFETs
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Chung, Steve S. |
| 國立交通大學 |
2017-04-21T06:49:07Z |
Experimental Techniques on the Understanding of the Charge Loss in a SONOS Nitride-storage Nonvolatile Memory
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Hsieh, E. R.; Wang, H. T.; Chung, Steve S.; Chang, Wayne; Wang, S. D.; Chen, C. H. |
| 國立交通大學 |
2017-04-21T06:49:02Z |
A Novel One Transistor Resistance-Gate Nonvolatile Memory
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Chung, Steve S.; Hsieh, E. R.; Yang, S. P.; Chuang, C. H. |
| 國立交通大學 |
2017-04-21T06:48:53Z |
The Random Dopant and Gate Oxide Variations in Trigate MOSFETs
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Chung, Steve S. |
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