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"chung steve s"的相關文件
顯示項目 111-135 / 136 (共6頁) << < 1 2 3 4 5 6 > >> 每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:45:54Z |
The Observation of Trapping and Detrapping Effects in High-k Gate Dielectric MOSFETs by a New Gate Current Random Telegraph Noise (I(G)-RTN) Approach
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Chang, C. M.; Chung, Steve S.; Hsieh, Y. S.; Cheng, L. W.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:45:53Z |
More Strain and Less Stress- The Guideline for Developing High-End Strained CMOS Technologies with Acceptable Reliability
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Chung, Steve S.; Hsieh, E. R.; Huang, D. C.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:39:25Z |
The Understanding of Strain-Induced Device Degradation in Advanced MOSFETs with Process-Induced Strain Technology of 65nm Node and Beyond
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Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H. |
| 國立交通大學 |
2014-12-08T15:36:22Z |
The understanding of the drain-current fluctuation in a silicon-carbon source-drain strained n-channel metal-oxide-semiconductor field-effect transistors
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Hsieh, E. R.; Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:33:48Z |
The Variability Issues in Small Scale Trigate CMOS Devices: Random Dopant and Trap Induced Fluctuations
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:33:16Z |
Experimental Observation on the Random Dopant Fluctuation of Small Scale Trigate CMOS Devices
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:32:43Z |
The Understanding of the Bulk Trigate MOSFET's Reliability Through the Manipulation of RTN Traps
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Hsieh, E. R.; Wu, P. C.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T. |
| 國立交通大學 |
2014-12-08T15:32:12Z |
The Physical Insights Into an Abnormal Erratic Behavior in the Resistance Random Access Memory
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Huang, Y. J.; Chung, Steve S.; Lee, H. Y.; Chen, Y. S.; Chen, F. T.; Gu, P. Y.; Tsai, M. -J. |
| 國立交通大學 |
2014-12-08T15:30:46Z |
The Understanding of Multi-level RTN in Trigate MOSFETs Through the 2D Profiling of Traps and Its Impact on SRAM Performance: A New Failure Mechanism Found
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Hsieh, E. R.; Tsai, Y. L.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T. |
| 國立交通大學 |
2014-12-08T15:29:05Z |
Low Voltage and High Speed SONOS Flash Memory Technology: The Strategies and the Reliabilities
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:28:53Z |
The mechanisms of random trap fluctuation in metal oxide semiconductor field effect transistors
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Hsieh, E. R.; Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:28:09Z |
Extension of Moore's Law Via Strained Technologies-The Strategies and Challenges
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:25:08Z |
Reliability issues for high performance nanoscale CMOS technologies with channel mobility enhancing schemes
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:24:57Z |
New observations on the uniaxial and biaxial strain-induced hot carrier and NBTI Reliabilities for 65nm node CMOS devices and beyond
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Chung, Steve S.; Huang, D. C.; Tsai, Y. J.; Lai, C. S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:24:57Z |
Understanding of the leakage components and its correlation to the oxide scaling on the SONOS cell endurance and retention
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Chen, C. H.; Chiang, P. Y.; Chung, Steve S.; Chen, Terry; Chou, George C. W.; Chu, C. H. |
| 國立交通大學 |
2014-12-08T15:22:00Z |
A New Observation of Strain-Induced Slow Traps in Advanced CMOS Technology with Process-Induced Strain Using Random Telegraph Noise Measurement
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Lin, M. H.; Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H. |
| 國立交通大學 |
2014-12-08T15:21:56Z |
Design of High-Performance and Highly Reliable nMOSFETs with Embedded Si:C S/D Extension Stressor(Si:C S/D-E)
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Chung, Steve S.; Hsieh, E. R.; Liu, P. W.; Chiang, W. T.; Tsai, S. H.; Tsai, T. L.; Huang, R. M.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:21:21Z |
A New and Simple Experimental Approach to Characterizing the Carrier Transport and Reliability of Strained CMOS Devices in the Quasi-Ballistic Regime
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Hsieh, E. R.; Chung, Steve S.; Liu, P. W.; Chiang, W. T.; Tsai, C. H.; Teng, W. Y.; Li, C. I.; Kuo, T. F.; Wang, Y. R.; Yang, C. L.; Tsai, C. T.; Ma, G. H. |
| 國立交通大學 |
2014-12-08T15:20:29Z |
New Observations on the Physical Mechanism of Vth-Variation in Nanoscale CMOS Devices After Long Term Stress
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Hsieh, E. R.; Chung, Steve S.; Tsai, C. H.; Huang, R. M.; Tsai, C. T.; Liang, C. W. |
| 國立交通大學 |
2014-12-08T15:16:50Z |
The incremental frequency charge pumping method: Extending the CMOS ultra-thin gate oxide measurement down to 1nm
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Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:10:38Z |
The investigation of capture/emission mechanism in high-k gate dielectric soft breakdown by gate current random telegraph noise approach
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Chung, Steve S.; Chang, C. M. |
| 國立交通大學 |
2014-12-08T15:10:03Z |
The channel backscattering characteristics of sub-100nm CMOS devices with different channel/substrate orientations
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Tsai, Y. J.; Chung, Steve S.; Liu, P. W.; Tsai, C. H.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:09:24Z |
Novel ultra-low voltage and high-speed programming/erasing schemes for SONOS flash memory with excellent data retention
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Chung, Steve S.; Tseng, Y. H.; Lai, C. S.; Hsu, Y. Y.; Ho, Eric; Chen, Terry; Peng, L. C.; Chu, C. H. |
| 國立交通大學 |
2014-12-08T15:07:36Z |
Technology roadmaps on the ballistic transport in strain engineered nanoscale CMOS devices
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Chung, Steve S.; Tsai, Y. J.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:07:17Z |
The proximity of the strain induced effect to improve the electron mobility in a silicon-carbon source-drain structure of n-channel metal-oxide-semiconductor field-effect transistors
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Hsieh, E. R.; Chung, Steve S. |
顯示項目 111-135 / 136 (共6頁) << < 1 2 3 4 5 6 > >> 每頁顯示[10|25|50]項目
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