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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"chung steve s"的相關文件
顯示項目 131-136 / 136 (共3頁)
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| 國立交通大學 |
2014-12-08T15:10:38Z |
The investigation of capture/emission mechanism in high-k gate dielectric soft breakdown by gate current random telegraph noise approach
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Chung, Steve S.; Chang, C. M. |
| 國立交通大學 |
2014-12-08T15:10:03Z |
The channel backscattering characteristics of sub-100nm CMOS devices with different channel/substrate orientations
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Tsai, Y. J.; Chung, Steve S.; Liu, P. W.; Tsai, C. H.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:09:24Z |
Novel ultra-low voltage and high-speed programming/erasing schemes for SONOS flash memory with excellent data retention
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Chung, Steve S.; Tseng, Y. H.; Lai, C. S.; Hsu, Y. Y.; Ho, Eric; Chen, Terry; Peng, L. C.; Chu, C. H. |
| 國立交通大學 |
2014-12-08T15:07:36Z |
Technology roadmaps on the ballistic transport in strain engineered nanoscale CMOS devices
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Chung, Steve S.; Tsai, Y. J.; Tsai, C. H.; Liu, P. W.; Lin, Y. H.; Tsai, C. T.; Ma, G. H.; Chien, S. C.; Sun, S. W. |
| 國立交通大學 |
2014-12-08T15:07:17Z |
The proximity of the strain induced effect to improve the electron mobility in a silicon-carbon source-drain structure of n-channel metal-oxide-semiconductor field-effect transistors
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Hsieh, E. R.; Chung, Steve S. |
| 國立交通大學 |
2014-12-08T15:03:20Z |
The State-of-the-Art Mobility Enhancing Schemes for High-Performance Logic CMOS Technologies
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Chung, Steve S. |
顯示項目 131-136 / 136 (共3頁)
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