|
English
|
正體中文
|
简体中文
|
Total items :0
|
|
Visitors :
51921028
Online Users :
1086
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"jen cw"
Showing items 91-100 of 106 (11 Page(s) Totally)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:04:40Z |
A NEW ARRAY ARCHITECTURE FOR PRIME-LENGTH DISCRETE COSINE TRANSFORM
|
GUO, JI; LIU, CM; JEN, CW |
| 國立交通大學 |
2014-12-08T15:04:24Z |
ON THE DESIGN AUTOMATION OF THE MEMORY-BASED VLSI ARCHITECTURES FOR FIR FILTERS
|
LEE, HR; JEN, CW; LIU, CM |
| 國立交通大學 |
2014-12-08T15:04:22Z |
BINARY PARTITION ALGORITHMS AND VLSI ARCHITECTURES FOR MEDIAN AND RANK ORDER FILTERING
|
LEE, CL; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:57Z |
CMOS THRESHOLD GATE AND NETWORKS FOR ORDER STATISTIC FILTERING
|
LEE, CL; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:48Z |
EFFICIENT TIME-DOMAIN SYNTHESIS OF PIPELINED RECURSIVE FILTERS
|
LAN, CP; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:25Z |
A NOVEL CORDIC-BASED ARRAY ARCHITECTURE FOR THE MULTIDIMENSIONAL DISCRETE HARTLEY TRANSFORM
|
GUO, JI; LIU, CM; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:15Z |
A LOW-COST RASTER ENGINE FOR VIDEO GAME, MULTIMEDIA PC AND INTERACTIVE TV
|
CHEN, CL; LIANG, BS; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:14Z |
SCALABLE ARRAY ARCHITECTURE DESIGN FOR FULL SEARCH BLOCK MATCHING
|
CHANG, SF; HWANG, JH; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:08Z |
UNIFIED ARRAY ARCHITECTURE FOR DISCRETE COSINE TRANSFORM, SINE TRANSFORM AND THEIR INVERSES
|
GUO, JI; CHEN, CS; JEN, CW |
| 國立交通大學 |
2014-12-08T15:02:42Z |
VASS - A VLSI array system synthesizer
|
Yeh, JW; Cheng, WJ; Jen, CW |
Showing items 91-100 of 106 (11 Page(s) Totally)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
View [10|25|50] records per page
|
