|
English
|
正體中文
|
简体中文
|
Total items :2825920
|
|
Visitors :
31410192
Online Users :
1081
Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"jiang i h r"
Showing items 46-52 of 52 (3 Page(s) Totally) << < 1 2 3 > >> View [10|25|50] records per page
臺大學術典藏 |
2018-09-10T09:22:25Z |
Timing ECO optimization via B?zier curve smoothing and fixability identification
|
Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
臺大學術典藏 |
2018-09-10T09:22:25Z |
Timing ECO optimization using metal-configurable gate-array spare cells
|
Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
臺大學術典藏 |
2018-09-10T08:42:37Z |
Simultaneous functional and timing ECO
|
Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
臺大學術典藏 |
2018-09-10T08:42:36Z |
Timing ECO optimization via B?zier curve smoothing and fixability identification
|
Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG |
臺大學術典藏 |
2018-09-10T05:58:32Z |
Reliable crosstalk-driven interconnect optimization
|
Jiang, I.H.-R.; Pan, S.-R.; Chang, Y.-W.; Jou, J.-Y.; YAO-WEN CHANG |
臺大學術典藏 |
2018-09-10T03:29:37Z |
Crosstalkdriven interconnect optimization by simultaneous gate and wire sizing
|
Jiang, I.H.R.; Chang, Y.W.; Jou, J.Y.; YAO-WEN CHANG |
國立交通大學 |
2015-12-02T02:59:13Z |
Feature detection for image analytics via FPGA acceleration
|
Chang, H. -Y.; Jiang, I. H. -R.; Hofstee, H. P.; Jamsek, D.; Nam, G. -J. |
Showing items 46-52 of 52 (3 Page(s) Totally) << < 1 2 3 > >> View [10|25|50] records per page
|