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"jiang i h r"的相关文件
显示项目 16-25 / 52 (共6页)
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| 臺大學術典藏 |
2020-06-11T06:12:57Z |
Functional ECO using metal-configurable gate-array spare cells
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Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:56Z |
FF-bond: Multi-bit flip-flop bonding at placement
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Tsai, C.-C.;Shi, Y.;Luo, G.;Jiang, I.H.-R.; Tsai, C.-C.; Shi, Y.; Luo, G.; Jiang, I.H.-R.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:56Z |
Machine-learning-based hotspot detection using topological classification and critical feature extraction
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Yu, Y.-T.;Lin, G.-H.;Jiang, I.H.-R.;Chiang, C.; Yu, Y.-T.; Lin, G.-H.; Jiang, I.H.-R.; Chiang, C.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:56Z |
PushPull: Short path padding for timing error resilient circuits
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Yang, Y.-M.;Jiang, I.H.-R.;Ho, S.-T.; Yang, Y.-M.; Jiang, I.H.-R.; Ho, S.-T.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:55Z |
Novel pulsed-latch replacement based on time borrowing and spiral clustering
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Chang, C.-L.;Jiang, I.H.-R.;Yang, Y.-M.;Tsai, E.Y.-W.;Chen, A.S.-H.; Chang, C.-L.; Jiang, I.H.-R.; Yang, Y.-M.; Tsai, E.Y.-W.; Chen, A.S.-H.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:54Z |
Optimal wiring topology for electromigration avoidance considering multiple layers and obstacles
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Jiang, I.H.-R.;Chang, H.-Y.;Chang, C.-L.; Jiang, I.H.-R.; Chang, H.-Y.; Chang, C.-L.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:54Z |
INTEGRA: Fast multi-bit flip-flop clustering for clock power saving based on interval graphs
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Jiang, I.H.-R.;Chang, C.-L.;Yang, Y.-M.;Tsai, E.Y.-W.;Chen, L.S.-F.; Jiang, I.H.-R.; Chang, C.-L.; Yang, Y.-M.; Tsai, E.Y.-W.; Chen, L.S.-F.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:54Z |
VIFI-CMP: Variability-tolerant chip-multiprocessors for throughput and power
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Lee, W.Y.;Jiang, I.H.-R.; Lee, W.Y.; Jiang, I.H.-R.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:52Z |
ECO optimization using metal-configurable gate-array spare cells
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Chang, H.-Y.;Jiang, I.H.-R.;Chang, Y.-W.; Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; HUI-RU JIANG |
| 臺大學術典藏 |
2020-06-11T06:12:52Z |
PushPull: Short-path padding for timing error resilient circuits
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Yang, Y.-M.;Jiang, I.H.-R.;Ho, S.-T.; Yang, Y.-M.; Jiang, I.H.-R.; Ho, S.-T.; HUI-RU JIANG |
显示项目 16-25 / 52 (共6页)
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