English  |  正體中文  |  简体中文  |  2809390  
???header.visitor??? :  27002366    ???header.onlineuser??? :  512
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"li j c m"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-25 of 40  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2021-09-02T00:04:10Z Systematic Hold-time Fault Diagnosis and Failure Debug in Production Chips Liu C.-Y;Wu M.-T;Li J.C.-M;Bhargava G;Nigh C.; Liu C.-Y; Wu M.-T; Li J.C.-M; Bhargava G; Nigh C.; CHIEN-MO LI
臺大學術典藏 2021-09-02T00:04:09Z Diagnosis technique for Clustered Multiple Transition Delay Faults You Y.-S;Liu C.-Y;Wu M.-T;Chen P.-W;Li J.C.-M.; You Y.-S; Liu C.-Y; Wu M.-T; Chen P.-W; Li J.C.-M.; CHIEN-MO LI
臺大學術典藏 2021-09-02T00:04:09Z High Efficiency and Low Overkill Testing for Probabilistic Circuits Lee M.-T;Wu C.-H;Liu S.-T;Hsieh C.-Y;Li J.C.-M.; Lee M.-T; Wu C.-H; Liu S.-T; Hsieh C.-Y; Li J.C.-M.; CHIEN-MO LI
臺大學術典藏 2021-09-02T00:04:09Z QATG: Automatic Test Generation for Quantum Circuits Wu C.-H;Hsieh C.-Y;Li J.-Y;Li J.C.-M.; Wu C.-H; Hsieh C.-Y; Li J.-Y; Li J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-30T02:49:18Z An accurate timing-aware diagnosis algorithm for multiple small delay defects Chen P.-J. ;Wei-Li Hsu ;Li J.C.-M. ;Tseng N.-H. ;Chen K.-Y. ;Changchien W.-P. ;Liu C.C.C.; Chen P.-J.; WEI-LI HSU; Li J.C.-M.; Tseng N.-H.; Chen K.-Y.; Changchien W.-P.; Liu C.C.C.
臺大學術典藏 2020-06-29T01:20:17Z Automatic test pattern generation Cheng, K.-T.T.;Wang, L.-C.;Li, H.;Li, J.C.-M.; Cheng, K.-T.T.; Wang, L.-C.; Li, H.; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:15Z Robust test pattern generation for hold-time faults in nanometer technologies Chen, Y.-W.; Chang, C.-M.; Yang, K.-C.; Li, J.C.-M.; CHIEN-MO LI; Ho, Y.-H.; Ho, Y.-H.;Chen, Y.-W.;Chang, C.-M.;Yang, K.-C.;Li, J.C.-M.
臺大學術典藏 2020-06-29T01:20:15Z Parallel order ATPG for test compaction Chen, Y.-W.;Ho, Y.-H.;Chang, C.-M.;Yang, K.-C.;Li, M.-T.;Li, J.C.-M.; Chen, Y.-W.; Ho, Y.-H.; Chang, C.-M.; Yang, K.-C.; Li, M.-T.; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:15Z ATPG and test compression for probabilistic circuits Wu, C.-H.; Li, J.C.-M.; CHIEN-MO LI; Yang, K.-C.;Lee, M.-T.;Wu, C.-H.;Li, J.C.-M.; Yang, K.-C.; Lee, M.-T.
臺大學術典藏 2020-06-29T01:20:14Z Test methodology for PCHB/PCFB Asynchronous Circuits Shen, T.-Y.;Pai, C.-C.;Chen, T.-C.;Li, J.C.-M.;Pan, S.; Shen, T.-Y.; Pai, C.-C.; Chen, T.-C.; Li, J.C.-M.; Pan, S.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:14Z Test Pattern Modification for Average IR-Drop Reduction Ding, W.-S.;Hsieh, H.-Y.;Han, C.-Y.;Li, J.C.-M.;Wen, X.; Ding, W.-S.; Hsieh, H.-Y.; Han, C.-Y.; Li, J.C.-M.; Wen, X.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:13Z A multicircuit simulator based on inverse jacobian matrix reuse Lee, H.-I.;Han, C.-Y.;Li, J.C.-M.; Lee, H.-I.; Han, C.-Y.; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:12Z Placement optimization of flexible TFT digital circuits Liu, W.-H.;Ma, E.-H.;Wei, W.-E.;Li, J.C.-M.; Liu, W.-H.; Ma, E.-H.; Wei, W.-E.; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:12Z Using launch-on-capture for testing scan designs containing synchronous and asynchronous clock domains Wu, S.;Wang, L.-T.;Wen, X.;Jiang, Z.;Tan, L.;Zhang, Y.;Hu, Y.;Jone, W.-B.;Hsiao, M.S.;Li, J.C.-M.;Huang, J.-L.;Yu, L.; Wu, S.; Wang, L.-T.; Wen, X.; Jiang, Z.; Tan, L.; Zhang, Y.; Hu, Y.; Jone, W.-B.; Hsiao, M.S.; Li, J.C.-M.; Huang, J.-L.; Yu, L.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:10Z Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits Chiang, K.-Y.;Ho, Y.-H.;Chen, Y.-W.;Pan, C.-S.;Li, J.C.-M.; Chiang, K.-Y.; Ho, Y.-H.; Chen, Y.-W.; Pan, C.-S.; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2020-06-29T01:20:09Z Fault Simulation and Test Generation Li, J.C.-M.;Hsiao, M.S.; Li, J.C.-M.; Hsiao, M.S.; CHIEN-MO LI
臺大學術典藏 2020-06-16T06:36:17Z Test generation of path delay faults induced by defects in power TSV Shih, C.-J.;Hsieh, S.-A.;Lu, Y.-C.;Li, J.C.-M.;Wu, T.-L.;Chakrabarty, K.; Shih, C.-J.; Hsieh, S.-A.; Lu, Y.-C.; Li, J.C.-M.; Wu, T.-L.; Chakrabarty, K.; YI-CHANG LU
臺大學術典藏 2020-06-11T06:50:41Z Using launch-on-capture for testing scan designs containing synchronous and asynchronous clock domains Wu, S.;Wang, L.-T.;Wen, X.;Jiang, Z.;Tan, L.;Zhang, Y.;Hu, Y.;Jone, W.-B.;Hsiao, M.S.;Li, J.C.-M.;Huang, J.-L.;Yu, L.; Wu, S.; Wang, L.-T.; Wen, X.; Jiang, Z.; Tan, L.; Zhang, Y.; Hu, Y.; Jone, W.-B.; Hsiao, M.S.; Li, J.C.-M.; Huang, J.-L.; Yu, L.; JIUN-LANG HUANG
臺大學術典藏 2020-06-11T06:45:49Z An at-speed self-testable technique for the high speed domino adder Wang, Y.-S.;Hsieh, M.-H.;Liu, C.-M.;Liu, C.-W.;Li, J.C.-M.;Chen, C.C.-P.; Wang, Y.-S.; Hsieh, M.-H.; Liu, C.-M.; Liu, C.-W.; Li, J.C.-M.; Chen, C.C.-P.; CHUNG-PING CHEN
臺大學術典藏 2020-06-11T06:15:26Z Test generation of path delay faults induced by defects in power TSV Shih, C.-J.;Hsieh, S.-A.;Lu, Y.-C.;Li, J.C.-M.;Wu, T.-L.;Chakrabarty, K.; Shih, C.-J.; Hsieh, S.-A.; Lu, Y.-C.; Li, J.C.-M.; Wu, T.-L.; Chakrabarty, K.; TZONG-LIN WU
臺大學術典藏 2019-04-22T05:22:34Z Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree construction Jiang, J.-H.R.;Li, J.C.M.;Pai, Y.-C.;Wen, H.-T.;Wang, J.-J.;Pai, C.-C.;Wang, R.-Y.;Chang, Y.-W.; Wang, R.-Y.; Pai, C.-C.; Wang, J.-J.; Wen, H.-T.; Pai, Y.-C.; Chang, Y.-W.; Li, J.C.M.; Jiang, J.-H.R.
臺大學術典藏 2018-09-10T08:34:44Z An accurate timing-aware diagnosis algorithm for multiple small delay defects Chen, P.-J.;Hsu, W.-L.;Li, J.C.-M.;Tseng, N.-H.;Chen, K.-Y.;Changchien, W.-P.;Liu, C.C.C.; Chen, P.-J.; Hsu, W.-L.; Li, J.C.-M.; Tseng, N.-H.; Chen, K.-Y.; Changchien, W.-P.; Liu, C.C.C.; WEI-LI HSU; CHIEN-MO LI
臺大學術典藏 2018-09-10T08:19:10Z CSER: BISER-based concurrent soft-error resilience Laung-Terng Wang;Touba, N.A.;Zhigang Jiang;Shianling Wu;Jiun-Lang Huang;Li, J.C.-M.; Laung-Terng Wang; Touba, N.A.; Zhigang Jiang; Shianling Wu; Jiun-Lang Huang; Li, J.C.-M.; CHIEN-MO LI; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:10Z Static timing analysis for flexible TFT circuits Chao-Hsuan Hsu;Liu, C.;En-Hua Ma;Li, J.C.-M.; Chao-Hsuan Hsu; Liu, C.; En-Hua Ma; Li, J.C.-M.; CHIEN-MO LI
臺大學術典藏 2018-09-10T08:14:25Z Reliability screening of a-Si TFT circuits: Very-low voltage and I DDQ Testing Shen, S.-T.;Liu, C.;Ma, E.-H.;Cheng, I.-C.;Li, J.C.-M.; Shen, S.-T.; Liu, C.; Ma, E.-H.; Cheng, I.-C.; Li, J.C.-M.; I-CHUN CHENG; CHIEN-MO LI

Showing items 1-25 of 40  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page