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教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
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機構 日期 題名 作者
國立臺灣大學 2004 Magnetic-to-digital converters using single-amplifier-based second-order delta-sigma modulators Kuo, Chien-Hung; Chen, Shr-Lung; Liu, Shen-Iuan
國立臺灣大學 2004 A low voltage-power 13-bit 16 MSPS CMOS pipelined ADC Liu, Ming-Huang; Huang, Kuo-Chan; Ou, Wei-Yang; Su, Tsung-Yi; Liu, Shen-Iuan
國立臺灣大學 2004 Low-voltage and low-power CMOS voltage-to-current converter Liu, Weihsing; Liu, Shen-Iuan
國立臺灣大學 2004 A 3.125-Gb/s Clock and Data Recovery Circuit for the 10-Gbase-LX4 Ethernet Yang, Rong-Jyi; Chen, Shang-Ping; Liu, Shen-Iuan
國立臺灣大學 2004 Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection Chang, Hsiang-Hui; Yang, Rong-Jyi; Liu, Shen-Iuan
國立臺灣大學 2004 A 1-V 10.7-MHz fourth-order bandpass ΔΣ modulators using two switched op amps Kuo, Chien-Hung; Liu, Shen-Iuan
國立臺灣大學 2004 A 1.5 V 12-bit 16 MSPS CMOS Pipelined ADC with 68 dB Liu, Ming-Huang; Ou, Wei-Yang; Su, Tsung-Yi; Huang, Kuo-Chan; Liu, Shen-Iuan
淡江大學 2003-12 A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator Chang, Hsiang-hui; Kuo, Chien-hung; Liu, Ming-huang; Liu, Shen-Iuan
淡江大學 2003-08 A 1V, 11-Bits Double-Sampling Delta-Sigma Modulator 郭建宏; Kuo, Chien-hung; Kao, Tsung-kai; Liu, Shen-Iuan
國立臺灣大學 2003-06 Selective metal parallel shunting inductor and its VCO application Wu, Chia-Hsin; Kuo, Chun-Yi; Liu, Shen-Iuan
國立臺灣大學 2003-06 Low jitter Butterworth delay-locked loops Chang, Hsiang-Hui; Sun, Chih-Hao; Liu, Shen-Iuan
國立臺灣大學 2003-04 A Spread-Spectrum Clock Generator With Triangular Modulation Chang, Hsiang-Hui; Hua, I-Hui; Liu, Shen-Iuan
淡江大學 2003-02 CMOS Magnetic Field to Frequency Converter Chen, Shr-lung; Kuo, Chien-hung; Liu, Shen-iuan
國立臺灣大學 2003-01 CMOS exponential function generator Liu, Weihsing; Liu, Shen-Iuan
國立臺灣大學 2003 A fast locking and low jitter delay-locked loop using DHDL Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan
國立臺灣大學 2003 CMOS magnetic field to frequency converter Chen, Shr-Lung; Kuo, Chien-Hung; Liu, Shen-Iuan
國立臺灣大學 2003 Analysis of on-chip spiral inductors using the distributed capacitance model Wu, Chia-Hsin; Tang, Chih-Chun; Liu, Shen-Iuan
國立臺灣大學 2003 An 800Mb/s tracking clock recovery receiver for the IEEE P1394a serial bus Chang, Hsiang-Hui; Dehng, Giang-Kaai; Liu, Shen-Iuan
國立臺灣大學 2003 CMOS Tunable 1/x Circuit and its Applications Liu, Weihsing; Liu, Shen-Iuan
國立臺灣大學 2003 A sub-1V fourth-order bandpass delta-sigma modulator Chang, Hsiang-Hui; Kuo, Chien-Hung; Liu, Ming-Huang; Liu, Shen-Iuan
淡江大學 2002-12 Multi-bit Delta-Sigma Modulator Using a Modified DWA Algorithm Kuo, Chien-hung; Hsueh, Tzu-chien; Liu, Shen-iuan
國立臺灣大學 2002-08 Analysis of on-chip spiral inductors using the distributed capacitance model Wu, Chia-Hsin; Tang, Chih-Chun; Liu, Shen-Iuan
國立臺灣大學 2002-08 A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan
臺大學術典藏 2002-08 A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan; Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan
國立臺灣大學 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan
國立臺灣大學 2002-05 A wide-range and fixed latency of one clock cycle delay-locked loop Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan
國立臺灣大學 2002-05 CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90/spl deg/ delay network Tang, Chih-Chun; Wu, Chia-Hsin; Li, Kun-Hsien; Lee, Tai-Cheng; Liu, Shen-Iuan
國立臺灣大學 2002-05 Analysis and application of miniature 3D inductor Wu, Chia-Hsin; Tang, Chih-Chun; Chiu, Chi-Kun; Liu, Shen-Iuan
臺大學術典藏 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei
臺大學術典藏 2002-05 CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90/spl deg/ delay network Tang, Chih-Chun; Wu, Chia-Hsin; Li, Kun-Hsien; Lee, Tai-Cheng; Liu, Shen-Iuan; Tang, Chih-Chun; Wu, Chia-Hsin; Li, Kun-Hsien; Lee, Tai-Cheng; Liu, Shen-Iuan
國立臺灣大學 2002-04 2.4 GHz offset-cancelling down-conversion mixer Tang, Chih-Chun; Li, Kun-Hsien; Liu, Shen-Iuan
國立臺灣大學 2002 Miniature 3-D Inductors in Standard CMOS Process Tang, Chih-Chun; Wu, Chia-Hsin; Liu, Shen-Iuan
國立臺灣大學 2002 A wide-range delay-locked loop with a fixed latency of one clock cycle Chang, Hsiang-Hui; Lin, Jyh-Woei; Yang, Ching-Yuan; Liu, Shen-Iuan
國立臺灣大學 2002 Systematic generation of current-mode linear transformation filters based on multiple output CCIIs Hwang, Yuh-Shyan; Hung, Pei-Tzu; Chen, Wei; Liu, Shen-Iuan
國立臺灣大學 2002 A 1V 5.8GHz low noise amplifier in a 0.35um standard CMOS process Tang, Chih-Chun; Liu, Shen-Iuan
國立臺灣大學 2002 Multi-bit delta-sigma modulator using a modified DWA algorithm Kuo, Chien-Hung; Hsueh, Tzu-Chien; Liu, Shen-Iuan
淡江大學 2001-10 CMOS oversampling Delta-Sigma magnetic-to-digital converters Kuo, Chien-hung; Chen, Shr-lung; Ho, Lee-an; Liu, Shen-iuan
淡江大學 2001-05 CMOS oversampling ΔΣ magnetic to digital converters Ho, Lee-an; Chen, Shr-lung; Kuo, Chien-hung; Liu, Shen-iuan
國立臺灣大學 2001-05 CMOS oversampling /spl delta//spl Sigma/ magnetic to digital converters Ho, Lee-An; Chen, Shr-Lung; Kuo, Chien-Hung; Liu, Shen-Iuan
國立臺灣大學 2001-05 A fast-lock mixed-mode DLL using a 2-b SAR algorithm Dehng, Guang-Kaai; Lin, Jyh-Woei; Liu, Shen-Iuan
國立臺灣大學 2001 An 8-bit 10 MS/s Folding and Interpolating ADC Using the Continuous-Time Auto-Zero Technique Liu, Ming-Huang; Liu, Shen-Iuan
國立臺灣大學 2001 Low-voltage analog tripler circuit Chang, Cheng-Chieh; Liu, Shen-Iuan; Hwang, Yuh-Shyan
國立臺灣大學 2001 A one-wire approach for skew compensating clock distribution based on bidirectional techniques Yang, Ching-Yuan; Liu, Shen-Iuan
國立臺灣大學 2001 Integrator and differentiator with time constant multiplicationusing current feedback amplifier Lee, Jiin-Long; Liu, Shen-Iuan
國立臺灣大學 2001 Low-voltage CMOS low-noise amplifier using planar-interleavedtransformer Tang, Chih-Chun; Liu, Shen-Iuan
國立臺灣大學 2001 A 2.4GHz low voltage CMOS down-conversion double-balanced mixer TANG, Chih-Chun; WU, Chia-Hsin; FENG, Wu-Sheng; LIU, Shen-Iuan
國立臺灣大學 2001 Low-Voltage CMOS Frequency Synthesizer for ERMES Pager Application Hsu, June-Ming; Dehng, Guang-Kaai; Yang, Ching-Yuan; Yang, Chu-Yuan; Liu, Shen-Iuan
國立臺灣大學 2001 A CMOS 400-Mb/s serial link for AS-memory systems using a PWMscheme Chen, Wei-Hung; Dehang, Guang-Kaai; Chen, Jong-Woei; Liu, Shen-Iuan
國立臺灣大學 2000-09 Current-mode full-wave rectifier and vector summation circuit Chang, Cheng-Chieh; Liu, Shen-Iuan
臺大學術典藏 2000-09 Current-mode full-wave rectifier and vector summation circuit Chang, Cheng-Chieh; Liu, Shen-Iuan; Chang, Cheng-Chieh; Liu, Shen-Iuan

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