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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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2019臺灣學術機構典藏
研討會
機構典藏系統RC7版本已
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Institution Date Title Author
修平科技大學 2004-03 BJT peak voltage detector M. C. Shiau
修平科技大學 2003-12 Peak voltage detector with leakage current compensation M. C. Shiau
修平科技大學 2000-03 Design of the sense amplifier circuit for Read Only Memory M. C. Shiau
修平科技大學 1999-08 A low noise design for output buffer circuit M. C. Shiau
修平科技大學 1999-03 The signal delay in interconnection lines considering the effects of small-geometry CMOS inverters M. C. Shiau;C. Y. Wu
修平科技大學 1999-02 Design of the novel input buffer circuits M. C. Shiau
修平科技大學 1999-02 Design of the Novel Input Buffer Circuits H. Z. Chen;M. C. Shiau
修平科技大學 1993-12 Power dissipation models and performance improvement techniques for CMOS inverters with RC line and tree interconnections M. C. Shiau;H. C. Tang
修平科技大學 1990-10 Delay models and speed improvement techniques for RC tree interconnections among small-geometry CMOS inverters C. Y. Wu;M. C. Shiau
修平科技大學 1990-09 General and efficient timing models for CMOS AND-OR-INVERTER and OR-AND-INVERTER gates C. Y. Wu;M. C. Shiau

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