臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
國立中山大學	2009-11	A Non-Classical Self-Aligned _-Shaped Source/Drain Ultrathin SOI Transistor for Future Planar MOSFET Technology	Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hsieh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo
國立中山大學	2009-07	A Novel Self-Align Double Gate MOSFET with Source/Drain Tie	Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學	2009-07	Improving Reliability and Diminishing Parasitic Capacitance Effects in a Vertical Transistor with Embedded Gate	Jyi-Tsong Lin;Chih-Hao Kuo;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen
國立中山大學	2009-06	The impact of Junction Depth on Vertical Sidewall MOSFETs with Embedded Gate	Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen;Chih-Hung Sun;Hsien-Nan Chiu
國立中山大學	2009-05	A Novel Double Gate MOSFET with Self-Align Process and Source/Drain Tie	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學	2009-05	Simulation Study of Novel FinFET Devices with connected body	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學	2009-05	Future of Planar Self-Aligned Block Oxide Based MOSFET Technology	Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hao Kuo;Tzu-Feng Chang;Chih-Hung Sun;Po-Hsieh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen
國立中山大學	2009-05	A Novel Double Gate MOSFET with Self-align Process and Source/Drain Tie	Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學	2009-04	A New Novel FinFET Device	Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學	2009-03	Study of New Novel FinFET Device with Its Bodies been Connected	Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng

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