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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
義守大學 2013-06 A nearly constant delay and low power VLSI design of a pipeline Reed–Solomon encoder for storage and communication systems Chia-Sheng Wen;Yan-Haw Chen;Trieu-Kien Truong;Shen-Fu Hsiao
國立中山大學 2009-01 An 8.69 Mvertices/s 278 Mpixels/s Tile-based 3D Graphics SoC HW/SW Development for Consumer Electronics Liang-Bi Chen;Ruei-Ting Gu;Wei-Sheng Huang;Chien-Chou Wang;Wen-Chi Shiue;Tsung-Yu Ho;Yun-Nan Chang;Shen-Fu Hsiao;Chung-Nan Lee;Ing-Jer Huang
國立中山大學 2009 具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統---軟硬體開發及整合---子計畫四:三維電腦繪圖晶片系統之Vertex Shader 處理器設計(III) 蕭勝夫;莊作彬; Shen-Fu Hsiao;Tso-Bing Juang
國立中山大學 2008-05 An Automatic Hardware Generator for Special Arithmetic Functions Using Various ROM-Based Approximation Approaches Shen-Fu Hsiao; Ping-Chung Wei; Ching-Pin Lin
國立中山大學 2008-05 Area-Oriented Pass-Transistor Logic Synthesis Using Buffer Elimination and Layout Compaction Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學 2008-04-23 An 8.69 Mvertices/s 278 Mpixels/s Tile-based 3D Graphics Full Pipeline with Embedded Performance Counting Module, Real-Time Bus Tracer and Protocol Checker for Consumer Electronics Ruei-Ting Gu; Wei-Sheng Huang; Chien-Chou Wang; Wen-Chi Shiue; Tsung-Yu Ho; Chung-Hua Tsai; Tzu-Ching Tien; Da-Jing; Zhang-Jian; Sheng-Yu Chiu; Ing-Jer Huang; Yun-Nan Chang; Shen-Fu Hsiao; Sheng-Yu Chiu; Jin-Hua Hong; Chung-Nan Lee; Ming-Chao Chiang
國立中山大學 2008-04 Transistor Sizing and Layout Merging of Basic in Pass Transistor Logic Cell Library Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學 2007-08 Multple-Input XOR/XNOR Circuit Design Using Pass-Transistor Logic and Its Application in Cryptography Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
國立中山大學 2007-08 Performance Comparisons and Tradeoffs of Table-Based Arithmetic Function Evaluators Ping-Chung Wei; Ching-Pin Lin; Shen-Fu Hsiao
國立中山大學 2007-06-20 A Low Cost Tile-based 3D Graphics Full Pipeline with Real-time Performance Monitoring Support for OpenGL ES in Consumer Electronics Ruei-Ting Gu; Tse-Chen Yeh; Wei-Sheng Huang; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學 2007 嵌入式晶片系統資料路徑設計之算術功能單元產生器(III) 蕭勝夫; Shen-Fu Hsiao
國立中山大學 2007 具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統-軟硬體開發及整合---子計畫四:三維電腦繪圖晶片系統之Vertex Shader 處理器設計(I) 蕭勝夫; Shen-Fu Hsiao; 莊作彬; Tso-Bing Juang
國立中山大學 2006-12 Integrated System Architecture Synthesis of Distributed Embedded Systems for Multimedia Applications Jin-Lin Liu; Shiann-Rong Kuang; Shen-Fu Hsiao
國立中山大學 2006-12 An Automatic Cache Generator Based on Content-Addressable Memory Shen-Fu Hsiao; Sze-Yun Lin; Tze-Chorng Cheng; Ming-Yu Tsai
國立中山大學 2006-12 Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學 2006-08 A 3D GrAPHICS SOC FOR DIGITAL TELEVISION Ruei-Ting Gu; Tse-Chen Yeh; Ken-Yu Lin; Chih-Yuen Lee; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學 2006-08 Design and Verification of a Platform-Based Low-Cost 3D Graphics Geometry Engine Using Area-Reduced Arithmetic Units Shen-Fu Hsiao; Ting-Yuan Huang; Tze-Chieng Tieng
國立中山大學 2006-08 Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding Shen-Fu Hsiao; Yo-Chi Chen; Ming-Yu Tsai; Tze-Chong Cheng
國立中山大學 2006-03 Memory-Free Low-Cost Designs of Advanced Encryption Standard Using Common Subexpression Elimination for Sub-functions in Transformations Shen-Fu Hsiao;Ming-Chih Chen;Chia-Shin Tu
國立中山大學 2006 嵌入式晶片系統資料路徑設計之算術功能單元產生器(II) 蕭勝夫; Shen-Fu Hsiao
國立中山大學 2005-5 An Efficient Pass-Transistor-Logic Synthesizer Using Multiplexers and Inverters Only Shen-Fu Hsiao; Ming-Yu Tsai; Ming-Chih Chen; Chia-Sheng Wen
國立中山大學 2005-10 System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin
國立中山大學 2005-09 Efficient Substructure Sharing Methods for Optimizing the Inner-Product Operations in Rijndael Advanced Encryption Standard Shen-Fu Hsiao;Ming-Chih Chen
國立中山大學 2005-08 Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學 2005-07 A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan

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