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Taiwan Academic Institutional Repository >
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"su pin"
Showing items 121-170 of 199 (4 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:38:26Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs
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Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:25Z |
Impact of Surface Orientation on the Sensitivity of FinFETs to Process Variations-An Assessment Based on the Analytical Solution of the Schrodinger Equation
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Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:38:05Z |
Impact of Quantum Confinement on Short-Channel Effects for Ultrathin-Body Germanium-on-Insulator MOSFETs
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Wu, Yu-Sheng; Hsieh, Hsin-Yuan; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:37:33Z |
Experimental Investigation of Surface-Roughness-Limited Mobility in Uniaxial Strained pMOSFETs
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Chen, William P. N.; Kuo, Jack J. Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:58Z |
Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:50Z |
Built-in Effective Body-Bias Effect in Ultra-Thin-Body Hetero-Channel III-V-on-Insulator n-MOSFETs
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Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:16Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:11Z |
FinFET SRAM Cell Optimization Considering Temporal Variability due to NBTI/PBTI and Surface Orientation
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Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:55Z |
Investigation of Backgate-Bias Dependence of Threshold-Voltage Sensitivity to Process and Temperature Variations for Ultra-Thin-Body Hetero-Channel MOSFETs
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Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:52Z |
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits
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Fan, Ming-Long; Yang, Shao-Yu; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:20Z |
Simulation and Investigation of Random Grain-Boundary-Induced Variabilities for Stackable NAND Flash Using 3-D Voronoi Grain Patterns
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Yang, Ching-Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:18Z |
Impacts of Single Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits
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Yang, Shao-Yu; Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Analysis of Germanium FinFET Logic Circuits and SRAMs with Asymmetric Gate to Source/Drain Underlap Devices
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Source/Drain Series Resistance Induced Feedback Effect on Drain Current Mismatch and Its Implication
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Kuo, Jack J. -Y.; Fan, Ming-Long; Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Design and Optimization of 6T SRAM using Vertically Stacked Nanowire MOSFETs
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Tsai, Ming-Fu; Fan, Ming-Long; Pao, Chia-Hao; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:20Z |
Comparative Leakage Analysis of GeOI FinFET and Ge Bulk FinFET
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Investigation of Single-Trap-Induced Random Telegraph Noise for Tunnel FET Based Devices, 8T SRAM Cell, and Sense Amplifiers
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Device Design and Analysis of Logic Circuits and SRAMs for Germanium FinFETs on SOI and Bulk Substrates
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:13Z |
Threshold Voltage Design of UTB SOI SRAM With Improved Stability/Variability for Ultralow Voltage Near Subthreshold Operation
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nein; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:30Z |
Threshold Voltage Design and Performance Assessment of Hetero-Channel SRAM Cells
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Design and Analysis of Robust Tunneling FET SRAM
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Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:22Z |
Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices Using a Voronoi Approach
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Chou, Shao-Heng; Fan, Ming-Long; Su, Pin |
| 國立交通大學 |
2014-12-08T15:30:04Z |
Variation Tolerant CLSAs for Nanoscale Bulk-CMOS and FinFET SRAM
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Tsai, Ming-Fu; Tsai, Jen-Huan; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:03Z |
A Comprehensive Comparative Analysis of FinFET and Trigate Device, SRAM and Logic Circuits
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Pao, Chia-Hao; Fan, Ming-Long; Tsai, Ming-Fu; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:29:40Z |
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:28:05Z |
Impacts of Random Telegraph Noise on FinFET Devices, 6T SRAM cell, and Logic Circuits
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:25:22Z |
Quantum Confinement Effect in Short-Channel Gate-All-Around MOSFETs and Its Impact on the Sensitivity of Threshold Voltage to Process Variations
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Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:25:21Z |
Investigation of Static Noise Margin of FinFET SRAM Cells in Sub-threshold Region
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Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:25:09Z |
Temperature Dependences of RF Small-Signal Characteristics for the SOI Dynamic Threshold Voltage MOSFET
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Huang, Sheng-Yi; Hung, Cheng-Chou; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:25:08Z |
RF extrinsic resistance extraction considering neutral-body effect for partially-depleted SOI MOSFETs
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Lin, Chien-Ting; Liang, Victor; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:24:28Z |
Investigation of Low Frequency Noise in Uniaxial Strained PMOSFETs
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Kuo, Jack J. -Y.; Chen, William P. -N.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:24:25Z |
Investigation of Static Noise Margin of Ultra-Thin-Body SOI SRAM Cells in Subthreshold Region using Analytical Solution of Poisson's Equation
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Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:23:48Z |
"Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits"
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:23:33Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-Threshold SRAMs
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Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:23:32Z |
Impact of Quantum Confinement on Backgate-Bias Modulated Threshold-Voltage and Subthreshold Characteristics for Ultra-Thin-Body GeOI MOSFETs
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Yu, Chang-Hung; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:22:22Z |
Impact of Quantum Confinement on Subthreshold Swing and Electrostatic Integrity of Ultra-Thin-Body GeOI and InGaAs-OI n-MOSFETs
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Yu, Chang-Hung; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:21:55Z |
Investigation of Temperature-Dependent High-Frequency Noise Characteristics for Deep-Submicrometer Bulk and SOI MOSFETs
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Chen, Bo-Yuan; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:21:55Z |
Impact of Uniaxial Strain on Channel Backscattering Characteristics and Drain Current Variation for Nanoscale PMOSFETs
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Lee, Wei; Kuo, Jack J. -Y.; Chen, Willian P. -N.; Su, Pin; Jeng, Min-Chie |
| 國立交通大學 |
2014-12-08T15:21:54Z |
A Closed-Form Quantum "Dark Space" Model for Predicting the Electrostatic Integrity of Germanium MOSFETs With High-k Gate Dielectric
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Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:21:25Z |
Band-to-Band-Tunneling Leakage Suppression for Ultra-Thin-Body GeOI MOSFETs Using Transistor Stacking
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:20Z |
Impacts of Single Trap Induced Random Telegraph Noise on FinFET Devices and SRAM Cell Stability
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Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:19Z |
Comprehensive Analysis of UTB GeOI Logic Circuits and 6T SRAM Cells considering Variability and Temperature Sensitivity
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Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:19Z |
Self-Heating Induced Feedback Effect on Drain Current Mismatch and Its Modeling
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Kuo, Jack J-Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:20:59Z |
Enhanced Temperature Dependence of Phonon-Scattering-Limited Mobility in Compressively Uniaxial Strained pMOSFETs
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Chen, William Po-Nien; Kuo, Jack Jyun-Yan; Su, Pin |
| 國立交通大學 |
2014-12-08T15:19:54Z |
Design and Analysis of Ultra-Thin-Body SOI Based Subthreshold SRAM
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Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:16:47Z |
Investigation of scaling for multi-gate MOSFETs using analytical solution of 3-D Poisson's equation
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Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:14:23Z |
Investigation of analogue performance for process-induced-strained PMOSFETs
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Kuo, Jack J-Y; Chen, William P-N; Su, Pin |
| 國立交通大學 |
2014-12-08T15:14:12Z |
On the RF extrinsic resistance extraction for partially-depleted SOI MOSFETs
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Wang, Sheng-Chun; Su, Pin; Chen, Kun-Ming; Lin, Chien-Ting; Liang, Victor; Huang, Guo-Wei |
| 國立交通大學 |
2014-12-08T15:13:45Z |
On the enhanced impact ionization in uniaxial strained p-MOSFETs
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Su, Pin; Kuo, Jack J. -Y. |
Showing items 121-170 of 199 (4 Page(s) Totally)
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