|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51125153
線上人數 :
895
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"su pin"的相關文件
顯示項目 121-130 / 199 (共20頁) << < 8 9 10 11 12 13 14 15 16 17 > >> 每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:38:26Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs
|
Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:38:25Z |
Impact of Surface Orientation on the Sensitivity of FinFETs to Process Variations-An Assessment Based on the Analytical Solution of the Schrodinger Equation
|
Wu, Yu-Sheng; Su, Pin |
| 國立交通大學 |
2014-12-08T15:38:05Z |
Impact of Quantum Confinement on Short-Channel Effects for Ultrathin-Body Germanium-on-Insulator MOSFETs
|
Wu, Yu-Sheng; Hsieh, Hsin-Yuan; Hu, Vita Pi-Ho; Su, Pin |
| 國立交通大學 |
2014-12-08T15:37:33Z |
Experimental Investigation of Surface-Roughness-Limited Mobility in Uniaxial Strained pMOSFETs
|
Chen, William P. N.; Kuo, Jack J. Y.; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:58Z |
Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:50Z |
Built-in Effective Body-Bias Effect in Ultra-Thin-Body Hetero-Channel III-V-on-Insulator n-MOSFETs
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:36:16Z |
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:11Z |
FinFET SRAM Cell Optimization Considering Temporal Variability due to NBTI/PBTI and Surface Orientation
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:55Z |
Investigation of Backgate-Bias Dependence of Threshold-Voltage Sensitivity to Process and Temperature Variations for Ultra-Thin-Body Hetero-Channel MOSFETs
|
Yu, Chang-Hung; Su, Pin |
| 國立交通大學 |
2014-12-08T15:35:52Z |
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits
|
Fan, Ming-Long; Yang, Shao-Yu; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
顯示項目 121-130 / 199 (共20頁) << < 8 9 10 11 12 13 14 15 16 17 > >> 每頁顯示[10|25|50]項目
|