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Institution Date Title Author
國立交通大學 2014-12-08T15:44:34Z Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology Wang, HCH; Diaz, CH; Liew, BK; Sun, JYC; Wang, TH
國立交通大學 2014-12-08T15:43:22Z Improving the RF performance of 0.18 mu m CMOS with deep n-well implantation Su, JG; Hsu, HM; Wong, SC; Chang, CY; Huang, TY; Sun, JYC
國立交通大學 2014-12-08T15:42:55Z Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices Wang, HCH; Wang, CC; Diaz, CH; Liew, BK; Sun, JYC; Wang, TH
國立交通大學 2014-12-08T15:40:51Z A floating well method for exact capacitance-voltage measurement of nano technology Su, HD; Chiou, BS; Wu, SY; Chang, MH; Lee, KH; Chen, YS; Chao, CP; See, YC; Sun, JYC
國立交通大學 2014-12-08T15:40:26Z Characteristics of oxide breakdown and related impact on device of ultrathin (2.2 nm) silicon dioxide Su, HD; Chiou, BS; Wu, SY; Chang, MH; Lee, KH; Chen, YS; Cha, CP; See, YC; Sun, JYC
國立交通大學 2014-12-08T15:40:05Z Bi-mode breakdown test methodology of ultrathin oxide Su, HD; Chiou, BS; Ko, CY; Wu, SY; Chang, MH; Lee, KH; Chen, YS; Chao, CP; See, YC; Sun, JYC

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