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Showing items 11-19 of 19  (1 Page(s) Totally)
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Institution Date Title Author
國立臺灣大學 2005-05 A low power scheduling method using dual V/sub dd/ and dual V/sub th/ Tsai, Kun-Lin; Chang, Szu-Wei; Lai, Feipei; Ruan, Shanq-Jang
國立臺灣大學 2005 量子點紅外線偵測器之成長與光電特性 蔡昆霖; Tsai, Kun-Lin
國立臺灣大學 2005 Bipartitioning and encoding in low-power pipelined circuits Ruan, Shanq-Jang; Tsai, Kun-Lin; Naroska, Edwin; Lai, Feipei
國立臺灣大學 2005 Low Power Dynamic Bus Encoding for Deep Sub-micron Design Tsai, Kun-Lin; Ruan, Shanq-Jang; Chen, Li-Wei; Lai Feipei; Naroska, Edwin
國立臺灣大學 2004 Circuit Partition and Reordering Technique for Low Power IP Tsai, Kun-Lin; Ruan, Shanq-Jang; Huang, Chun-Ming; Naroska, Edwin; Lai, Feipei
國立臺灣大學 2001-05 Synthesis of partition-codec architecture for low power and small area circuit design Ruan, Shanq-Jang; Lin, Jen-Chiun; Chen, Po-Hung; Tsai, Kun-Lin; Lai, Feipei
國立臺灣大學 2001-05 An entropy-based algorithm to reduce area overhead for bipartition-codec architecture Chen, Po-Hung; Ruan, Shanq-Jang; Wu, Kuen-Pin; Hu, Dai-Xun; Lai, Feipei; Tsai, Kun-Lin
國立臺灣大學 2001 A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits Ruan, Shanq-Jang; Shang, Rung-Ji; Lai, Feipei; Tsai, Kun-Lin
國立臺灣大學 2000-12 An effective output-oriented algorithm for low power multipartition architecture Ruan, Shanq-Jang; Lin, Jen-Chiun; Chen, Po-Hung; Lai, Feipei; Tsai, Kun-Lin; Yu, Chung-Wei

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