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| 國立交通大學 |
2014-12-08T15:23:11Z |
A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing
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Tu, Ming-Hsien; Lin, Jihi-Yu; Tsai, Ming-Chien; Lu, Chien-Yu; Lin, Yuh-Jiun; Wang, Meng-Hsueh; Huang, Huan-Shun; Lee, Kuen-Di; Shih, Wei-Chiang (Willis); Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:19:40Z |
Asymmetrical Write-Assist for Single-Ended SRAM Operation
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Lin, Jihi-Yu; Tu, Ming-Hsien; Tsai, Ming-Chien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:06:27Z |
Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist
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Tu, Ming-Hsien; Lin, Jihi-Yu; Tsai, Ming-Chien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立成功大學 |
2004-06-18 |
健保IC卡模擬系統之設計與實作
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杜明賢; Tu, Ming-Hsien |
Showing items 31-34 of 34 (2 Page(s) Totally)
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