|
English
|
正體中文
|
简体中文
|
Total items :2819131
|
|
Visitors :
28509353
Online Users :
1650
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"yeh chang lin"
Showing items 1-5 of 5 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 國立成功大學 |
2008-11 |
Finite element model verification for packaged printed circuit board by experimental modal analysis
|
Lee, Ying-Chih; Wang, Bor-Tsuen; Lai, Yi-Shao; Yeh, Chang-Lin; Chen, Rong-Sheng |
| 國立成功大學 |
2008-05 |
Structural design optimization for board-level drop reliability of wafer-level chip-scale packages
|
Tsai, Tsung-Yueh; Lai, Yi-Shao; Yeh, Chang-Lin; Chen, Rong-Sheng |
| 國立成功大學 |
2007-10 |
High-G drop impact response and failure analysis of a chip packaged printed circuit board
|
Jenq, Syh-Tsang; Sheu, H. S.; Yeh, Chang-Lin; Lai, Yi-Shao; Wu, Jenq-Dah |
| 國立成功大學 |
2007-08 |
Response spectra analysis for undamped structural systems subjected to half-sine impact acceleration pulses
|
Tsai, Tsung-Yueh; Yeh, Chang-Lin; Lai, Yi-Shao; Chen, Rong-Sheng |
| 國立成功大學 |
2007-01 |
Transient submodeling analysis for board-level drop tests of electronic packages
|
Tsai, Tsung-Yueh; Yeh, Chang-Lin; Lai, Yi-Shao; Chen, Rong-Sheng |
Showing items 1-5 of 5 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
