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教育部委托研究计画 计画执行:国立台湾大学图书馆
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"yeh chang lin"的相关文件
显示项目 1-5 / 5 (共1页)
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| 國立成功大學 |
2008-11 |
Finite element model verification for packaged printed circuit board by experimental modal analysis
|
Lee, Ying-Chih; Wang, Bor-Tsuen; Lai, Yi-Shao; Yeh, Chang-Lin; Chen, Rong-Sheng |
| 國立成功大學 |
2008-05 |
Structural design optimization for board-level drop reliability of wafer-level chip-scale packages
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Tsai, Tsung-Yueh; Lai, Yi-Shao; Yeh, Chang-Lin; Chen, Rong-Sheng |
| 國立成功大學 |
2007-10 |
High-G drop impact response and failure analysis of a chip packaged printed circuit board
|
Jenq, Syh-Tsang; Sheu, H. S.; Yeh, Chang-Lin; Lai, Yi-Shao; Wu, Jenq-Dah |
| 國立成功大學 |
2007-08 |
Response spectra analysis for undamped structural systems subjected to half-sine impact acceleration pulses
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Tsai, Tsung-Yueh; Yeh, Chang-Lin; Lai, Yi-Shao; Chen, Rong-Sheng |
| 國立成功大學 |
2007-01 |
Transient submodeling analysis for board-level drop tests of electronic packages
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Tsai, Tsung-Yueh; Yeh, Chang-Lin; Lai, Yi-Shao; Chen, Rong-Sheng |
显示项目 1-5 / 5 (共1页)
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