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显示项目 90501-90525 / 2307984 (共92320页)
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机构 日期 题名 作者
國立交通大學 2014-12-08T15:30:05Z A 10-Bit 200-MS/s Digitally-Calibrated Pipelined ADC Using Switching Opamps Fang, Bing-Nan; Wu, Jieh-Tsorng
臺大學術典藏 2018-09-10T09:25:30Z A 10-bit 200-MS/s Reconfigurable Pipelined A/D Converter C-C Ho;T-C Lee; C-C Ho; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2019-10-31T07:12:32Z A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN
中華大學 2006 A 10-bit 250-MSPS Digital to Analog Converter for WLAN Applications 田慶誠; Tien, Ching-Cheng
中華大學 2006 A 10-bit 250-MSPS Digital to Analog Converter for WLAN Applications 王志湖; Wang, Chih-Hu
臺大學術典藏 2021-05-24T13:07:20Z A 10-bit 300 MS/s pipeline ADC with time-domain MDAC HSIN-SHU CHEN; Tseng, Chien Jian; Chuang, Yu Wei; Chang, Chun Wei
臺大學術典藏 2021-09-02T00:04:59Z A 10-bit 300 MS/s pipeline ADC with time-domain MDAC Chen H.-S;Tseng C.-J;Chuang Y.-W;Chang C.-W.; Chen H.-S; Tseng C.-J; Chuang Y.-W; Chang C.-W.; HSIN-SHU CHEN
國立交通大學 2014-12-08T15:29:24Z A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation Fang, Bing-Nan; Wu, Jieh-Tsorng
國立臺灣科技大學 2015 A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications Lai, W.C.
國立臺灣科技大學 2016 A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications Lai, W.C.
臺大學術典藏 2020-06-11T06:34:55Z A 10-bit 40-MS/s Time-Domain Two-Step ADC with Short Calibration Time Chen, L.-J.;Liu, S.-I.; Chen, L.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏 2020-06-11T06:21:00Z A 10-bit 400-MS/s 36-mW interleaved ADC Huang, Y.-C.;Lin, C.-Y.;Lee, T.-C.; Huang, Y.-C.; Lin, C.-Y.; Lee, T.-C.; TAI-CHENG LEE
臺大學術典藏 2018-09-10T07:45:58Z A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications Nai-Kuan Chou; Pang, W.-Y.; Wang, C.-S.; Chang, Y.-K.; Chou, N.-K.; Wang, C.-K.; Nai-Kuan Chou
臺大學術典藏 2020-03-09T07:30:51Z A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications Pang W.-Y.; Wang C.-S.; Chang Y.-K.; NAI-KUAN CHOU; Wang C.-K.
義守大學 1998-08 A 10-Bit 50MHz Analog-to-Digital Converter Using Pipeline Architecture and Current-Mode Techniques 林啟元;Lin, Kai-yuen;涂振嘉;Twu, Chen-chia
淡江大學 2005 A 10-bit 50Msample/s pipelined analog-to-digital converter 黃世麟; Huang, Shih-lin
國立虎尾科技大學 2007 A 10-bit 60-MS/s low-power CMOS pipelined analog-to-digital converter Lu, Chi-Chang;Lee, Tsung-Sum
亞洲大學 2015-01 A 10-bit current-steering CMOS digital to analog converter 易昶霈;Yi, Chang-Pei
亞洲大學 2015-01 A 10-bit current-steering CMOS digital to analog converter 易昶霈;Yi, Chang-Pei
亞洲大學 2015-01 A 10-bit current-steering CMOS digital to analog converter Yi, 易昶霈 Chang-Pei
亞洲大學 2015/01 A 10-bit current-steering CMOS digital to analog converter Yi, 易昶霈 Chang-Pei
亞洲大學 2015-01 A 10-bit current-steering CMOS digital to analog converter Yi, 易昶霈;Chang-Pei
亞洲大學 2015-01 A 10-bit current-steering CMOS digital to analog converter Yi), 易昶霈(Chang-Pei
臺大學術典藏 2020-06-11T06:45:53Z A 10-bit current-steering DAC for HomePlug AV2 powerline communication system in 90nm CMOS Cheng, W.-S.;Hsieh, M.-H.;Hung, S.-H.;Hung, S.-Y.;Chen, C.C.-P.; Cheng, W.-S.; Hsieh, M.-H.; Hung, S.-H.; Hung, S.-Y.; Chen, C.C.-P.; CHUNG-PING CHEN
國立暨南國際大學 2013 A 10-Bit DAC With 1.6-Bit Interpolation Cells for Compact LCD Column Driver ICs 林佑昇; Lin, YS

显示项目 90501-90525 / 2307984 (共92320页)
<< < 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 > >>
每页显示[10|25|50]项目