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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 397556-397565 / 2348973 (共234898頁)
<< < 39751 39752 39753 39754 39755 39756 39757 39758 39759 39760 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:17:09Z |
ESD failure mechanisms of analog I/O cells in 0.18-mu m CMOS technology
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Ker, MD; Chen, SH; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:40:18Z |
ESD implantation for subquarter-micron CMOS technology to enhance ESD robustness
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Ker, MD; Hsu, HC; Peng, JJ |
| 國立交通大學 |
2014-12-08T15:19:14Z |
ESD implantations for on-chip ESD protection with layout consideration in 0.18-mu m salicided CMOS technology
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Ker, MD; Chuang, CH; Lo, WY |
| 國立交通大學 |
2014-12-08T15:26:45Z |
ESD implantations in 0.18-mu m salicided CMOS technology for on-chip ESD protection with layout consideration
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Ker, MD; Chuang, CH |
| 國立交通大學 |
2020-10-05T02:02:01Z |
ESD Improvements on Power N-Channel LDMOS Devices by the Composite Structure of Super Junctions Integrated With SCRs in the Drain Side
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Chen, Hung-Wei; Chen, Shen-Li; Huang, Yu-Ting; Chen, Hsun-Hsiang |
| 國立交通大學 |
2014-12-16T06:14:33Z |
ESD protection circuit
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Ker; Ming-Dou; Lin; Kun-Hsien |
| 國立交通大學 |
2014-12-16T06:14:37Z |
ESD protection circuit
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Ker; Ming-Dou; Lin; Kun-Hsien |
| 國立交通大學 |
2014-12-08T15:38:52Z |
ESD Protection Circuit for High-Voltage CMOS ICs with Improved Immunity Against Transient-Induced Latchup
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Ker, Ming-Dou; Hsu, Che-Lun; Chen, Wen-Yi |
| 國立交通大學 |
2014-12-16T06:14:05Z |
ESD protection circuitry with multi-finger SCRS
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Ker Ming-Dou; Lin Chun-Yu; Wang Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:37Z |
ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS
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Ker, Ming-Dou; Lin, Chun-Yu; Wang, Chang-Tzu |
顯示項目 397556-397565 / 2348973 (共234898頁)
<< < 39751 39752 39753 39754 39755 39756 39757 39758 39759 39760 > >>
每頁顯示[10|25|50]項目
|
