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显示项目 90976-91025 / 2307984 (共46160页)
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机构 日期 题名 作者
國立交通大學 2014-12-08T15:36:34Z A 2.56 Gb/s Soft RS (255,239) Decoder Chip for Optical Communication Systems Lin, Yi-Min; Hsu, Chih-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi
臺大學術典藏 2020-05-04T08:21:52Z A 2.5D Approach to 360 Panorama Video Stabilization Shen, L.-C.;Huang, T.-K.;Chen, C.-S.;Chuang, Y.-Y.; Shen, L.-C.; Huang, T.-K.; Chen, C.-S.; Chuang, Y.-Y.; YUNG-YU CHUANG
臺大學術典藏 2020-05-04T08:22:04Z A 2.5D Approach to 360 Panorama Video Stabilization. Shen, Lin-Chen; Huang, Tzu-Kuei; Chen, Chu-Song; Chuang, Yung-Yu; YUNG-YU CHUANG
國立臺灣大學 2001 A 2.5D Finite/Infinite Element Approach for Modelling Visco-Elastic Bodies Subjected to Moving Loads Yang, Y. B.; Hung, H. H.
臺大學術典藏 2018-09-10T05:27:05Z A 2.5Gbps burst-mode clock and data recovery circuit Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
國立交通大學 2014-12-08T15:25:52Z A 2.5Gbps serial-link data transceiver in a 0.35 mu m digital CMOS technology Chen, WZ; Weng, MC
國立交通大學 2014-12-08T15:16:22Z A 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX applications Chen, Che-Sheng; Wuen, Wen-Shen; Wen, Kuei-Ann
國立交通大學 2019-04-02T06:04:44Z A 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX applications Chen, Che-Sheng; Wuen, Wen-Shen; Wen, Kuei-Ann
國立臺灣大學 2007 A 2.5GHz all-digital delay-locked loop in 0.13μm CMOS technology Yang, Rong-Jyi; Liu, Shen-Iuan
國立聯合大學 2010 A 2.5GHz CMOS power amplifier for WiMAX application Chen, Meng-Ping; Shih, Chun-Hsing; Chang, Wei; Lien, Chenhsin
中華大學 2007 A 2.5GHz Voltage Controlled FBAR Oscillator 高曜煌; Kao, Yao-Huang
中華大學 2007 A 2.5GHz Voltage Controlled Oscillator with Film Bulk Acoustic Resonator 高曜煌; Kao, Yao-Huang
國立交通大學 2017-04-21T06:49:11Z A 2.5GHz voltage controlled oscillator with film bulk acoustic resonator Yao-Huang Kao; Jon-Hong Lin; Nai-Yuan Kang; Yion-Ni Liu
淡江大學 2005-03 A 2.5V 6.4mW 10-bit 140MS/s Digital-to-Analog Converterwith Improved Current Mirror 郭建宏; Kuo, Chien-hung; Tsai, Jen-chieh
國立中山大學 2004-08 A 2.5V 8-bit 100MHzS/s 15.3mW Cur rent Mode Folding and Interpolation Analog to Digital Conver ter Using Back-end Amplifier Shi-Xuan;Jyi-Tsong Lin
國立交通大學 2017-04-21T06:49:42Z A 2.5W Tablet Speaker Delivering 3.2W Pseudo High Power by Psychoacoustic Model Based Adaptive Power Management System Chen, Shin-Hao; Peng, Shen-Yu; Chen, Ke-Horng; Lai, Shin-Chi; Kang, Sheng; Cheng, Kevin; Lin, Ying-Hsi; Huang, Chen-Chih; Lee, Chao-Cheng
國立交通大學 2015-12-02T03:01:00Z A 2.6mW,-192dB/Hz FOM Class-C QVCO Using Capacitive Source Degeneration Coupling Hong, Zhi-Hao; Wu, Chuan-Yi; Liao, Yu-Te
臺大學術典藏 2020-06-04T07:54:12Z A 2.8-6 GHz high-efficiency CMOS power amplifier with high-order harmonic matching network Nai, J.-K.;Hsiao, Y.-H.;Wang, Y.-S.;Lin, Y.-H.;Wang, H.; Nai, J.-K.; Hsiao, Y.-H.; Wang, Y.-S.; Lin, Y.-H.; Wang, H.; HUEI WANG
國立臺灣大學 2008 A 2.88mm2 50M-intersections/s ray-triangle intersection unit for interactive ray tracing Chang, Chen-Haur; Lee, Chuan-Yiu; Chien, Shao-Yi
臺大學術典藏 2018-09-10T07:03:47Z A 2.88mm2 50M-intersections/s ray-triangle intersection unit for interactive ray tracing Chang, C.-H.; Lee, C.-Y.; Chien, S.-Y.; SHAO-YI CHIEN
臺大學術典藏 2018-09-10T07:36:39Z A 2.89mW 50GOPS 16 × 16 16-core MIMO sphere decoder in 90nm CMOS Yang, C.-H.;Markovic, D.; Yang, C.-H.; Markovic, D.; CHIA-HSIANG YANG
國立臺灣大學 1998 A 2.9-Kilobase noncoding nuclear RNA function in the establishment of persistent Hz-1 viral infection Chao, Yu-Chan; Lee, Song-Tay; Chang, Ming-Chuan; Chen, Hong-Hwa; Chen, Shih-Shun; Wu, Tzong-Yuan; Liu, Fu-Hw; Hsu, Err-Lieh; Hou, Roger F.
中原大學 1998 A 2.9-kilobase noncoding nuclear RNA functions in the establishment of persistent Hz-1 viral infection Yu-Chan Chao;Song-Tay Lee;Ming-Chuan Chang;Hong-Hwa Chen;Shih-Shun Chen;Tzong-Yuan Wu;Fu-Hwa Liu;Err-Lieh Hsu;Roger F. Hou
南台科技大學 1998-05 A 2.9-Kilobase noncoding nuclear RNA functions in the establishment of persistent Hz-1 viral infection. 李松泰; Yu-Chan Chao; Song-Tay Lee; Ming-Chuan Chang; Hong-Hwa Chen; Shih-Shun Chen; Tzong-Yuan Wu; Fu-Hwa Liu; Err-Lieh Hsu; Roger F. Hou
臺大學術典藏 2020-06-11T06:25:37Z A 20 GHz power amplifier with IM3 distortion cancellation by load-split derivative superposition Kao, K.-Y.;Lin, H.-Y.;Lin, K.-Y.; Kao, K.-Y.; Lin, H.-Y.; Lin, K.-Y.; KUN-YOU LIN
臺大學術典藏 2020-06-11T06:31:42Z A 20 to 24 GHz + 16.8 dBm fully integrated power amplifier using 0.18 μm CMOS process Jen, Y.-N.;Tsai, J.-H.;Peng, C.-T.;Huang, T.-W.; Jen, Y.-N.; Tsai, J.-H.; Peng, C.-T.; Huang, T.-W.; TIAN-WEI HUANG
元智大學 2009-01 A 20 to 24 GHz +16.8-dBm fully integrated power amplifier using 0.18-µm CMOS process 蔡政翰; Yung-Nien Jen; Chung-Te Peng; Tian-Wei Huang
國立臺灣師範大學 2014-10-30T09:28:44Z A 20 to 24 GHz +16.8-dBm fully integrated power amplifier using 0.18-痠 CMOS process Yung-Nien Jen; Jeng-Han Tsai; Chung-Te Peng; Tian-Wei Huang
國立臺灣師範大學 2014-10-30T09:28:44Z A 20 to 24 GHz +16.8-dBm fully integrated power amplifier using 0.18-痠 CMOS process Yung-Nien Jen; Jeng-Han Tsai; Chung-Te Peng; Tian-Wei Huang
淡江大學 2005-03 A 20 Years Overview and Prospect of Interpretive Research in Taiwan: 1984-2003 陳維立; Wu, H. C.; Chen, W. J.
臺大學術典藏 2021-09-02T00:05:04Z A 20-43 GHz Low Noise GaAs Downconverter with Gbps Data-Links for Full 5G K/Ka-Band Backhauls Chen C.-N;Kuo T.-Y;Wang H.; Chen C.-N; Kuo T.-Y; Wang H.; HUEI WANG
臺大學術典藏 2021-03-12T08:41:03Z A 20-Gb/s 1: 2 demultiplexer with capacitive-splitting current-mode-logic latches JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN
國立臺灣大學 2007 A 20-Gb/s 1:2 Demultiplexer with capacitive-splitting current-mode-logic latches Chien, Jun-Chau; Lu, Liang-Hung
國立臺灣大學 2005-06 A 20-Gb/s 2-to-1 MUX and a 40-GHz VCO in 0.18-/spl mu/m CMOS technology Lee, Jri; Ding, Jian-Yu; Cheng, Tuan-Yi
臺大學術典藏 2006-09 A 20-Gb/s Adaptive Equalizer in 0.13 um CMOS Technology Lee, Jri; Lee, Jri
國立臺灣大學 2006-09 A 20-Gb/s Adaptive Equalizer in 0.13 um CMOS Technology Lee, Jri
臺大學術典藏 2018-09-10T06:03:22Z A 20-Gb/s Adaptive Equalizer in 0.13 μm CMOS Technology Jri Lee; JRI LEE
國立臺灣大學 2006 A 20-Gb/s Adaptive Equalizer in 0.13-μm CMOS Technology Lee, Jri
國立臺灣大學 2008 A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique Lee, Jri; Liu, Mingchung
國立臺灣大學 2008-03 A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique Lee, Jri; Liu, M.
臺大學術典藏 2020-06-11T07:06:09Z A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition Lee, Jri;Wu, Ke-Chung; Lee, Jri; Wu, Ke-Chung; JRI LEE
國立交通大學 2014-12-08T15:34:51Z A 20-Gb/s Optical Receiver with Integrated Photo Detector in 40-nm CMOS Huang, Shih-Hao; Chen, Wei-Zen
臺大學術典藏 2020-06-11T06:34:54Z A 20-Gb/s transmitter with adaptive preemphasis in 65-nm CMOS technology Kao, S.-Y.;Liu, S.-I.; Kao, S.-Y.; Liu, S.-I.; SHEN-IUAN LIU
國立交通大學 2019-04-02T06:04:28Z A 20-Gb/s, 2.4 pJ/bit, Fully Integrated Optical Receiver with a Baud-Rate Clock and Data Recovery Lee, Yuan-Sheng; Chen, Wei-Zen
國立彰化師範大學 2005-02 A 20-GHz CMOS RF Down-Conversion with an On-chip Antenna Su, Yu; Lin, Jau-Jr; Kenneth, K. O.
臺大學術典藏 2018-09-10T15:00:41Z A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulator Y-H Kang;C-Y Lin;T-C Lee; Y-H Kang; C-Y Lin; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:20:57Z A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulator. Kang, Yu-Hsuan;Lin, Chin-Yu;Lee, Tai-Cheng; Kang, Yu-Hsuan; Lin, Chin-Yu; Lee, Tai-Cheng; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:34:54Z A 20-MHz to 3-GHz wide-range multiphase delay-locked loop Chuang, C.-N.;Liu, S.-I.; Chuang, C.-N.; Liu, S.-I.; SHEN-IUAN LIU
國立中山大學 2002 A 20-year record of Sr-90 and heavy metals off the third Nuclear Power Plant in southern Taiwan C.T.A. Chen;S.J. Jiang
中國醫藥大學 2012-03 A 20-year retained guidewire, should it be removed? 林晏年(Yen-Nien Lin);周仁偉(Jen-Wei Chou);陳瑩惠(Yin-Huie Chen);劉健佑(Jian-You Liu);何承懋(Cheng-Mao Ho)*

显示项目 90976-91025 / 2307984 (共46160页)
<< < 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 > >>
每页显示[10|25|50]项目