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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"許健"的相關文件
顯示項目 96-107 / 107 (共5頁)
<< < 1 2 3 4 5 > >>
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| 亞洲大學 |
2009-08 |
Dependence of Breakdown Voltage on Drift Length and Linear Doping Gradients in SOI RESURF LDMOS Devices
|
楊紹明;Yang, Shao-Ming;許健;Sheu, Gene |
| 亞洲大學 |
2009-07 |
VARIATION OF LATERAL THICKNESSTECHNIQUES IN SOI LATERAL HIGH VOLTAGE DEVICE
|
郭宇鋒;Guo,Yufeng;王至剛;Wang1,Zhigong;許健;Sheu,Gene |
| 亞洲大學 |
2009-07 |
Variaton of Lateral Thickness techniques in SOI Lateral High Voltage Transistors
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郭宇鋒;Guo, Yufeng;王至剛;Wang, Zhigong;許健;Sheu, Gene |
| 亞洲大學 |
2009-05 |
A High Performance 80V Smart LDMOS Power Device Based on thin oxide technology
|
許健;Sheu, Gene;楊紹明;許愉珊;許健;Sheu, Gene |
| 亞洲大學 |
2009-03 |
Simulation Details for the Electrical Field Distribution and Breakdown Voltage of0.15μm Thin Film SOI Power Device
|
;You, Hsin-Chiang;Liu, Yen-Ling;Tsaur, Shyh-chang;許健;Sheu, Gene;許健;Sheu, Gene |
| 亞洲大學 |
2009-03 |
Simulation Details for the Electrical Field Distribution and Breakdown Voltage of 0.15μm Thin Film SOI Power Device
|
游信強;You, Hsin-Chiang;曹世昌;Tsaur, Shyh-Chang;許健;Sheu, Gene |
| 亞洲大學 |
2009-01 |
A High Performance 80V Smart LDMOS Power Device Based on Thin SOI Technology
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許健;Sheu, Gene;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2009 |
VARIATION OF LATERAL THICKNESS TECHNIQUES IN SOI LATERAL HIGH VOLTAGE DEVICE
|
許健;Sheu, Gene |
| 亞洲大學 |
2009 |
Reduced Kink Effect in An SOI LDMOS Structure with Graded Drift Region Thickness
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許健;Sheu, Gene;楊紹明;Yang, Shao-Ming |
| 亞洲大學 |
2009 |
An Analytical Model for Surface Electric Field Distributions in Ultra High Voltage (800V) Buried P-top LDMOS Devices
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許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;曹世昌;Tsaur, Shyh-Chang |
| 亞洲大學 |
2009 |
Comparison of High Voltage (200-300 Volts) Devices for Power Integrated Circuits
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許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;曹世昌;Tsaur, Shyh-Chang |
| 亞洲大學 |
2009 |
The Reliability of 200V P-channel Silicon-On-Insulator LDMOS on High Side operation
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楊紹明;Yang, Shao-Ming;許健;Sheu, Gene |
顯示項目 96-107 / 107 (共5頁)
<< < 1 2 3 4 5 > >>
每頁顯示[10|25|50]項目
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