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"謝曜式"

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Showing items 26-50 of 75 (3 Page(s) Totally)
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Institution	Date	Title	Author
中華大學	2006	A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic	謝曜式; Shieh, Yaw-Shih
中華大學	2006	High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Daubechies Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering	謝曜式; Shieh, Yaw-Shih
中華大學	2006	台灣科技產業結構性改變與管理之變遷	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform	謝曜式; Shieh, Yaw-Shih
中華大學	2006	An Efficient Line-Based Architecture for 2-D Lifting-Based DECT Using 9/7 Wavelet Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	無線網絡應用於新世代城鄉安全監控系統	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller	謝曜式; Shieh, Yaw-Shih
中華大學	2006	無線網絡應用於智慧型車輛安全監控及物流系統	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of Double- Rotation CORDIC Arithmetic	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation,	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficient and Cost-Effective LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter	謝曜式; Shieh, Yaw-Shih
中華大學	2006	The Closed-Loop Control of the Dual-Output Buck-Boost Converters with Structure of Single-Inductor Boost Converter	謝曜式; Shieh, Yaw-Shih

Showing items 26-50 of 75 (3 Page(s) Totally)
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