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"謝曜式"
Showing items 26-35 of 75 (8 Page(s) Totally) << < 1 2 3 4 5 6 7 8 > >> View [10|25|50] records per page
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
台灣科技產業結構性改變與管理之變遷
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering
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謝曜式; Shieh, Yaw-Shih |
Showing items 26-35 of 75 (8 Page(s) Totally) << < 1 2 3 4 5 6 7 8 > >> View [10|25|50] records per page
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