臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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"cho lan chou"

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Institution	Date	Title	Author
國立臺灣大學	2009	A 33.6-to-33.8Gb/s burst-mode CDR in 90nm CMOS technology	Cho, Lan-Chou; Lee, Chihun; Hung, Chao-Ching; Liu, Shen-Iuan
國立臺灣大學	2008-07	A 81.5~85.9GHz injection-locked frequency divider in 65nm CMOS	Cho, Lan-Chou; Tsai, Kun-Hung; Hung, Chao-Ching; Liu, Shen-Iuan
國立臺灣大學	2008	A 50.8–53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13-μm CMOS	Lee, Chihun; Cho, Lan-Chou; Wu, Jia-Hao; Liu, Shen-Iuan
國立臺灣大學	2007	A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- μm CMOS Technology	Cho, Lan-Chou; Lee, Chihun; Liu, Shen-Iuan

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