|
English
|
正體中文
|
简体中文
|
Total items :0
|
|
Visitors :
52915189
Online Users :
528
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"huang shih hsu"
Showing items 21-30 of 30 (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page
| 中原大學 |
2002-08 |
Performance and Power Driven Non-Zero Skew Clock Tree Design Methodology
|
Huang, Shih-Hsu;Lin, Yu-Hui |
| 中原大學 |
2001-05 |
An Efficient Membership Function Representation for High-Resolution Fuzzy Systems
|
Huang, Shih-Hsu;Lai, Jian-Yuan |
| 中原大學 |
2000-12 |
An Interconnect-Driven Low Power Design Methodology
|
Huang, Shih-Hsu;Hsiao, Hsu-Ming |
| 中原大學 |
2000-08 |
A New Scheduling Algorithm for Automatic Synthesis of the Control Blocks of Multi-way Branch Architectures
|
Huang, Shih-Hsu |
| 中原大學 |
1999-12 |
A Practical Clock Tree Synthesis Flow
|
Chi, Chen Mely;Huang, Shih-Hsu |
| 中原大學 |
1999-12 |
A Practical Clock Tree Synthesis Flow
|
Chi, Mely-Chen;Huang, Shih-Hsu |
| 國立臺灣大學 |
1995 |
A new approach to schedule operations across nested-ifs and nested-loops
|
Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 國立臺灣大學 |
1995 |
A new scheduling algorithm for synthesizing the control blocks of control-dominated circuits
|
Huang, Shih-Hsu; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 臺大學術典藏 |
1995 |
A new approach to schedule operations across nested-ifs and nested-loops
|
Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen; Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 臺大學術典藏 |
1995 |
Synthesis of false loop free circuits.
|
Huang, Shih-Hsu; Liu, Ta-Yung; Hsu, Yu-Chin; Oyang, Yen-Jen; YEN-JEN OYANG |
Showing items 21-30 of 30 (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page
|
