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Taiwan Academic Institutional Repository >
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"lin horng chih"
Showing items 161-185 of 232 (10 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:32:59Z |
Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire
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Lee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact
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Chen, Kun-Ming; Chen, Bo-Yuan; Chiu, Chia-Sung; Huang, Guo-Wei; Chen, Chun-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan; Chen, Ming-Yi; Yang, Yu-Chi; Jaw, Brenda; Wang, Kai-Li |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Fabrication of High-Performance ZnO Thin-Film Transistors With Submicrometer Channel Length
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Lin, Horng-Chih; Lyu, Rong-Jhe; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:57Z |
Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors
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Chen, Kun-Ming; Tsai, Tzu-I; Lin, Ting-Yao; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Guo-Wei; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:35Z |
A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires
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Lin, Horng-Chih; Lin, Zer-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
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Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions
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Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:32Z |
Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap
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Kuo, Chia-Hao; Hsu, Chia-Wei; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Characteristics of Planar Junctionless Poly-Si Thin-Film Transistors With Various Channel Thickness
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Lin, Horng-Chih; Lin, Cheng-I; Lin, Zer-Ming; Shie, Bo-Shiuan; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:51Z |
A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer
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Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:42Z |
Improved Performance of NILC Poly-Si Nanowire TFTs by Using Ni-Gettering
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Wang, Bau-Ming; Yang, Tzu-Ming; Wu, YewChung Sermon; Su, Chun-Jung; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory Operations
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Chen, Wei-Chen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization
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Su, Chun-Jung; Huang, Yu-Feng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:11Z |
Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications
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Tsai, Tzu-I; Chen, Kun-Ming; Lin, Horng-Chih; Lin, Ting-Yao; Su, Chun-Jung; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:25:06Z |
DC and AC NBTI stresses in pMOSFETs with PE-SiN capping
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Lu, Chia-Yu; Lin, Horng-Chih; Chang, Yi-Feng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:26Z |
A Novel Double-gated Nanowire TFT and Investigation of Its Size Dependency
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Chen, Wei-Chen; Lin, Chuan-Ding; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:06Z |
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
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Su, Chun-Jung; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:23:38Z |
Characteristics of n-Type Asymmetric Schottky-Barrier Transistors with Silicided Schottky-Barrier Source and Heavily n-Type Doped Channel and Drain
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Lin, Zer-Ming; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:23:36Z |
A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels
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Kuo, Chia-Hao; Lin, Horng-Chih; Lee, I-Che; Cheng, Huang-Chung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:54Z |
Analytical Model of Subthreshold Current and Threshold Voltage for Fully Depleted Double-Gated Junctionless Transistor
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Lin, Zer-Ming; Lin, Horng-Chih; Liu, Keng-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:53Z |
A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires
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Su, Chun-Jung; Su, Tuan-Kai; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:31Z |
The Degradation of MILC P-Channel Poly-Si TFTs under Dynamic Hot-Carrier Stress Using a Novel Test Structure
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Lin, Cheng-I; Hong, Wen-Chiang; Lin, Tin-Fu; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:22:23Z |
Resistive switching characteristics of multilayered (HfO2/Al2O3)(n) n=19 thin film
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Tzeng, Wen-Hsien; Zhong, Chia-Wen; Liu, Kou-Chen; Chang, Kow-Ming; Lin, Horng-Chih; Chan, Yi-Chun; Kuo, Chun-Chih; Tsai, Feng-Yu; Tseng, Ming Hong; Chen, Pang-Shiu; Lee, Heng-Yuan; Chen, Frederick; Tsai, Ming-Jinn |
| 國立交通大學 |
2014-12-08T15:21:54Z |
Performance Enhancement of Thin-Film Transistors With Suspended Poly-Si Nanowire Channels by Embedding Silicon Nanocrystals in Gate Nitride
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Kuo, Chia-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:21:15Z |
Relationships between the crystalline phase of an IGZO target and electrical properties of a-IGZO channel film
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Lee, Yih-Shing; Dai, Zuo-Ming; Lin, Cheng-I; Lin, Horng-Chih |
Showing items 161-185 of 232 (10 Page(s) Totally)
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