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"lin horng chih"的相关文件
显示项目 161-170 / 232 (共24页)
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| 國立交通大學 |
2014-12-08T15:32:59Z |
Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire
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Lee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact
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Chen, Kun-Ming; Chen, Bo-Yuan; Chiu, Chia-Sung; Huang, Guo-Wei; Chen, Chun-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan; Chen, Ming-Yi; Yang, Yu-Chi; Jaw, Brenda; Wang, Kai-Li |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Fabrication of High-Performance ZnO Thin-Film Transistors With Submicrometer Channel Length
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Lin, Horng-Chih; Lyu, Rong-Jhe; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:57Z |
Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors
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Chen, Kun-Ming; Tsai, Tzu-I; Lin, Ting-Yao; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Guo-Wei; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:35Z |
A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires
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Lin, Horng-Chih; Lin, Zer-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
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Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions
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Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:32Z |
Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap
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Kuo, Chia-Hao; Hsu, Chia-Wei; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Characteristics of Planar Junctionless Poly-Si Thin-Film Transistors With Various Channel Thickness
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Lin, Horng-Chih; Lin, Cheng-I; Lin, Zer-Ming; Shie, Bo-Shiuan; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:51Z |
A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer
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Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
显示项目 161-170 / 232 (共24页)
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