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"wu a y"的相关文件
显示项目 156-165 / 196 (共20页)
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| 臺大學術典藏 |
2018-09-10T05:52:05Z |
DSP engine design for LINC wireless transmitter systems
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Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; HEN-WAI TSAO |
| 臺大學術典藏 |
2018-09-10T05:24:16Z |
Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture
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Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
A scalable DCO design for portable ADPLL designs
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Wu, C.-T.; Wang, W.; Wey, I.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Digital signal processing engine design for polar transmitter in wireless communication systems
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Ko, H.-Y.; Wang, Y.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Low cost decision feedback equalizer (DFE) design for giga-bit systems
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Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications
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Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A 2gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications
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Wey, I.-C.; Chang, L.-H.; Chen, Y.-G.; Chang, S.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A DVB-T baseband demodulator design based on multimode silicon IPs
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Jheng, K.-Y.; Wu, T.-H.; Wang, Y.-C.; Yeo, J.-C.; Cho, Y.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A high-speed scalable shift-register based on-chip serial communication design for SoC applications
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Wang, W.; Wu, A.-Y.; AN-YEU(ANDY) WU; Wey, I.-C.; Chen, Y.-G.; Wu, C.-T. |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A memory-reduced Log-MAP kernel for turbo decoder
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AN-YEU(ANDY) WU; Wu, A.-Y.; Lin, C.-H.; Tsai, T.-H. |
显示项目 156-165 / 196 (共20页)
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