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Taiwan Academic Institutional Repository >
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"wu cy"
Showing items 401-410 of 607 (61 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:03:16Z |
A SIMPLE AND ACCURATE SIMULATION TECHNIQUE FOR FLASH EEPROM WRITING AND ITS RELIABILITY ISSUE
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WEN, KS; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:14Z |
A NEW SIMPLIFIED THRESHOLD-VOLTAGE MODEL FOR N-MOSFETS WITH NONUNIFORMLY DOPED SUBSTRATE AND ITS APPLICATION TO MOSFETS MINIATURIZATION
|
MAA, JJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:14Z |
A NEW STRUCTURE OF THE 2-D SILICON RETINA
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WU, CY; CHIU, CF |
| 國立交通大學 |
2014-12-08T15:03:12Z |
A CMOS CURRENT-MODE DESIGN OF MODIFIED LEARNING-VECTOR-QUANTIZATION NEURAL NETWORKS
|
LIU, RY; WU, CY; JOU, IC |
| 國立交通大學 |
2014-12-08T15:03:01Z |
A 2-D ANALYTIC MODEL FOR THE THRESHOLD-VOLTAGE OF FULLY DEPLETED SHORT GATE-LENGTH SI-SOI MESFETS
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HOU, CS; WU, CY |
| 國立交通大學 |
2014-12-08T15:02:57Z |
Synthesis of novel triacetal oxa-cage compounds
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Wu, HJ; Wu, CY; Lin, CC |
| 國立交通大學 |
2014-12-08T15:02:54Z |
Analog electronic cochlea design using multiplexing switched-capacitor circuits
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Bor, JC; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:54Z |
CMOS current-mode neural associative memory design with on-chip learning
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Wu, CY; Lan, JF |
| 國立交通大學 |
2014-12-08T15:02:49Z |
A novel method for extracting the metallurgical channel length of MOSFET's using a single device
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Li, HH; Chu, YL; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:48Z |
A design strategy for short gate length SOI MESFETs
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Hou, CS; Wu, CY |
Showing items 401-410 of 607 (61 Page(s) Totally)
<< < 36 37 38 39 40 41 42 43 44 45 > >>
View [10|25|50] records per page
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